Graphics Post silicon Test & Methodology Engineer

Austin, TX, US • Posted 4 days ago • Updated 5 hours ago
Full Time
On-site
Fitment

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Job Details

Skills

  • Debugging
  • Process Modeling
  • Manufacturing
  • Optimization
  • GPU
  • Product QA
  • DFT
  • ATPG
  • Physics
  • Python
  • Static Timing Analysis
  • Reporting
  • Data Analysis
  • JMP
  • Statistics
  • Failure Analysis
  • DLS
  • Investor Relations
  • International Relations
  • Information Retrieval

Summary

Do you love creating solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, large subsystems. You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll craft and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices.\\n\\nIn this role, you will be a cross functional liaison responsible for Pre-silicon inputs and debug on post-silicon to enable implementation, validation, and improvement of power efficiency in our GPU designs.

Are you a competent problem solver who thrives under pressure to find creative time critical solutions to chart the future of GPU designs at Apple? If so, we would love to hear from you.\nYou will isolate post-silicon issues into Test, Process, Design or interactions, drive stop gaps using PFA/EFA, and make corrective actions in future designs.\nEnsure manufacturing deliverables for Power/LVcc Design targets and work on power optimization by collaborating with Product and Silicon Validation teams\nYou will compare and close Post-silicon to Design targets \nYou will drive GPU inputs into Product, Test and Silicon Validation teams

Experience in DFT - ATPG and BIST \nDevice physics experience \nPerl or Python coding experience \nBS + 3 years of relevant experience

Good understanding of STA concepts - explain a PT report\nGood understanding of PVT (Process Voltage and Temperature) corners, and Guard bands\nExpertise in data analyses using Statistical analyses tools (JMP) with a good understanding of statistics\nFamiliarity with failure analyses techniques like emissions, DLS, LVI/LVP is desired\nFamiliarity with IR/IVD analyses to help drive correlation between silicon and design is desired\nATE experience is a plus
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 90733111
  • Position Id: 2677f5d11f441f60f45478ae3e4758ec
  • Posted 4 days ago
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