ASIC Power Engineer

Irvine, CA, US • Posted 1 day ago • Updated 10 hours ago
Full Time
On-site
Fitment

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Job Details

Skills

  • Use Cases
  • Test Cases
  • Decision-making
  • Computer Engineering
  • Scripting
  • Python
  • Perl
  • Tcl
  • Electrical Engineering
  • Power Management
  • Multi-core
  • Logic Synthesis
  • Communication
  • Collaboration
  • Wireless Communication
  • Bluetooth
  • System On A Chip
  • Modeling
  • ASIC
  • Estimating
  • Optimization
  • IPS
  • Debugging

Summary

We are seeking an ASIC Power Engineer to drive SoC power simulation, analysis and optimization for next-generation wireless SOC products. This role requires deep technical expertise in power estimation and a passion for developing highly power-efficient SoCs that enable breakthrough wireless experience.

In this highly visible role, you will be responsible for SoC power estimation, use case power analysis, and driving future SoC power optimization strategies. You will work with a team of talented engineers to integrate innovative power solutions and deliver industry-leading power efficiency.\n\nThe position focuses on SoC power estimation and optimization for power-critical wireless products. \n\n- Work with architects to define power-critical use cases and scenarios. \n- Establish power targets and collaborate with cross-functional teams to achieve optimization goals.\n- Define comprehensive test cases within design verification environments.\n- Generate accurate pre-silicon power estimations for design decision-making.\n- Analyze power consumption patterns and identify optimization opportunities.\n- Develop SoC power models for new architecture designs, enabling performance/power trade-off analysis.\n- Understand software and system-level interactions that impact overall power consumption.\n- Partner with lab and silicon characterization teams to correlate models with measured silicon data.

BS in Electrical Engineering, Computer Engineering, or related technical field\nHands-on experience with PtPx and PPRTL power analysis tools.\nProficiency in scripting languages including Python, Perl, or TCL.

Understanding of electrical properties of on-die PDN, power gating, package and system power delivery.\nHands-on experience with SoC power domains and power management unit (PMU) interactions in complex multi-core chipsets.\nKnowledge of power impact at architecture, logic design, and circuit levels.\nExperience in power model development for complex SoCs.\nFamiliarity with SoC design flow and methodology.\nStrong communication skills to collaborate effectively across multiple engineering disciplines.\nKnowledge of WiFi or Bluetooth standards and protocols.\nExperience in SoC power simulation, modeling, and analysis flow development.\nExperience in ASIC power estimation, analysis and optimization methodologies.\nExperience in power model development for IPs.\nHands-on experience in correlating pre-silicon power models with measured silicon data and driving model accuracy improvements through systematic debugging.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 90733111
  • Position Id: 2396a990e4b305b45a14dea4b0879b24
  • Posted 1 day ago
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