UFS IP Validation Engineer

Austin, TX, US • Posted 3 hours ago • Updated 3 hours ago

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We are looking for UFS IP Validation Engineer for our client in Austin, TX / Santa Clara, CA

Job Title: UFS IP Validation Engineer

Job Location: Austin, TX / Santa Clara, CA

Job Type: Contract

Job Description:

Pay Range: $44.82hr - $89.65hr

Responsibilities:

Participate in systems design development throughout entire product lifecycle, from pre-silicon and emulation through post-silicon and software integration and validation.
Lead technical presentations, demonstrating a good understanding of hardware architecture and expertise in systems design.
Collaborate with Design, Software, Tools and other teams to drive the definition of testing and debug methodologies to provide the best possible coverage and customer experience for the client UFS IP.
Work with Program Leadership team to define the end to end plan and highlight possible risk areas and address concerns during planning.
Be a leader and mentor to the operation team; be hands-on and lead by example
Isolation and debug of issues found in the southbridge and peripherals during pre-silicon, bring-up, validation, and production phases of S3 products.
Able to proactively support team culture that fosters knowledge sharing, excellence, and collaboration.
Defining and executing validation strategies, enablement of features and unit test plans.
Publishing and aligning test plan requirements, deliverables and dependencies
Working closely with supporting teams such as design, diagnostics, Software/Firmware/BIOS/driver, and project leadership.
Lead cross-functional technical discussions to drive root cause identification and resolution on technical issues.
Driving and participating in technical innovations to enhance client validation capabilities including tool and script developments, technical and methodology enhancements.

Requirements:

Knowledge of UFS standard and architecture, with encryption technology preferred
In-depth knowledge of SOC architecture and concepts.
In-depth knowledge of southbridge technology.
Experience with FPGA and other hardware emulation platforms for pre-silicon debug
Strong understanding of BIOS, OS (Windows/Linux), and driver-level interactions and common failure points.
Good understanding of Boot Flows/Sequences.
In-depth knowledge of system peripherals such as PCIe, NVMe, USB, I2C, UFS, SATA, SPI,UART and other data bus connections.
Experience with the UFS analyzer/exerciser, common lab equipment, computer hardware, and networks.
Led process improvement initiatives to improve engineering quality.
Strong technical leadership and mentoring skillsKnowledge of standard power management features and use-cases.

Preferred Experience:

Minimum 3-6 years of experience in pre and post-silicon validation and 4-8 years experience in semiconductor industry.
Demonstrated ability to grasp new technical concepts quickly.
Hardware description languages (e.g. Verilog).
Strong programming/scripting skills (e.g. Python, C/C++, Ruby).
Experience with IP/System level bring-up, SOC debug techniques and methodologies.
Strong analytical/problem solving skills and pronounced attention to details
Excellent written and verbal communication skills.
Self-starter, strong collaborator, and able to independently drive tasks to completion
Strong organizational skills and ability to handle multiple issues at the same time.

Academic Credentials:

Bachelor s/Master s degree in Computer Engineering, Electrical Engineering or related field strongly preferred.

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 10516350
Position Id: TX_UIVE_0127
Posted 3 hours ago

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UFS IP Validation Engineer

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