Sr Director, Cloud AI Rack Architecture and System Design

Company:
Qualcomm Technologies, Inc.

Job Area:
Engineering Group, Engineering Group > ASICS Engineering

General Summary:

About the role

Qualcomm's Cloud Business Unit is building next-generation AI inference rack scale solutions, anchored by the AI200/AI250 accelerator family. We are seeking a seasoned Senior Director to lead the end-to-end hardware architecture, design, and delivery of full rack-level solutions - from OCP/Open Rack-compliant chassis, power, and thermal systems to high-speed interconnects, management infrastructure, and ODM engagement. This leader will define Qualcomm's rack-scale differentiation strategy and drive execution across cross-functional hardware and systems teams.

Key Responsibilities

Rack Architecture & System Design

• Define and own end-to-end rack-scale architecture for Qualcomm AI accelerator platforms (AI200/AI250 family and future roadmap), targeting OCP Open Rack and 19" EIA form factors.
• Lead system-level design trade-offs spanning power delivery (48V DC busbar, rack PDU), cooling architecture, signal integrity, and mechanical integration.

Thermal & Cooling Systems

• Architect and oversee direct liquid cooling (DLC) systems including CDU sizing (e.g., 138+ kW per rack), blind-mate manifolds (UQD/UQDB), cold plates, leak detection, and coolant loop design.
• Ensure rack-level thermal validation and compliance with customer facility requirements (CDU inlet temperature, flow rate, pressure drop).

Power Architecture

• Define rack power delivery architectures including 48V DC busbars, modular PSU shelves and VR/PMIC integration.
• Drive power budget analysis across full rack configurations (compute blades, switches, storage, CDU) and ensure PUE/efficiency targets are met.

High-Speed Interconnects & Networking

• Lead rack-scale interconnect strategy encompassing CXL, UALink, PCIe Gen 6, and 800G/1.6T Ethernet switching fabrics (scale-up and scale-out).
• Own signal integrity requirements for high-performance PCB materials and rack-level cabling (copper and optical), including material trade-off analysis.

BMC / RMC & Rack Management

• Define and drive BMC/RMC architecture for OOB management, Redfish/IPMI compliance, telemetry, and health monitoring.
• Ensure DC-SCM 2.0 integration and multi-generation firmware roadmap aligned with OCP standards.

ODM & Ecosystem Engagement

• Lead technical engagement with ODM/OEM partners for rack-level NRE, design validation, manufacturing, and qualification.
• Partner with hyperscaler customers and CSPs to align rack-scale hardware solutions to datacenter facility and operational requirements.

Cross-Functional Leadership & Execution

• Build, mentor, and lead a high-performance team of rack-scale hardware, thermal, power, and mechanical engineers across multiple sites.
• Partner with ASIC, software, product management, and supply chain teams to drive rack-level productization milestones from concept to NPI.
• Own rack-level hardware validation and EVT/DVT/PVT planning, coordinating with QA and customer enablement teams.
• Manage rack-scale program budgets, headcount planning, and delivery schedules in alignment with Cloud BU product roadmap.

Experience

• 20+ years of experience in hardware engineering, with at least 5 years in a senior leadership role (Director or above).
• Proven track record of delivering rack-scale or full-system hardware platforms for cloud/data center markets.
• Deep expertise in OCP Open Rack v3 (ORv3) standards, OCP DC-MHS, DC-SCM, and related specifications.
• Hands-on experience with direct liquid cooling (DLC) system design and thermal architecture at the rack level.
• Strong background in high-speed digital design (PCIe Gen5/6, CXL, UALink, Ethernet 400G/800G) and signal integrity.
• Experience with rack-level power architecture including 48V DC distribution, VR/PMIC design, and efficiency optimization.
• Familiarity with BMC/RMC platforms, Redfish API, IPMI, and OCP management stack.
• Experience managing ODM/OEM partnerships for large-scale hardware development and qualifications.

Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 10+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 9+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.

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Pay range and Other Compensation & Benefits:
$249,900.00 - $374,900.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.