Analog Layout Engineer

Cupertino, CA, US • Posted 7 hours ago • Updated 7 hours ago
Full Time
No Travel Required
On-site
Depends on Experience
Fitment

Dice Job Match Score™

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Job Details

Skills

  • CMOS
  • Customer Focus
  • Data Analysis
  • Artificial Intelligence
  • Analog layout design

Summary

Hi,

 

This is Viswanath from Saksoft.

 

I have an exciting opportunity as an Sr. AI Enterprise Engineer with one of our clients. If you are interested in this opportunity, please share your updated Resume to proceed further. 

 

Job Title: Analog Layout Engineer

Location: Cupertino, CA (on-site)

Hire Type: Contract  

Duration: Long-term

 

Job Description:

Required Skills and Experience: 
Minimum 6+ years of experience in Analog layout design.
Experience developing and leading complex layout IC for high-speed applications in advanced CMOS FinFET technologies such as 7nm and below at the block level and chip level.
Thorough knowledge of industry standard EDA tools from Cadence, Mentor and Synopsys.
Experience with layout of high-performance high-speed analog mixed-signal blocks such Transceivers, CMOS drivers, high-speed Data converters and PLLs.
Experience with floor planning, block level routing and top-level chip assemble.
Knowledge of layout techniques such as floor planning, layer generation, thermal aware layout with consideration for electro-migration.

 

Thanks & Regards

Viswanath Dulam

Senior Team Lead - Recruitment

T:  (Direct) 

E:
W:  |   | 

   

Innovation   Customer focus   Openness   Respect   Enterprising

 

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 10416061
  • Position Id: 9053879
  • Posted 7 hours ago
Contact the job poster
Sridhar Periasami

Sridhar Periasami

Assistant Manager - Recruitment @ Saksoft
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