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Principal /Sr Principal PMIC Analog Designer

Chandler, AZ, US • Posted 18 hours ago • Updated 1 hour ago

Full Time

On-site

Fitment

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Job Details

Skills

Mentorship
Verilog
Design Review
Collaboration
Layout
Product QA
IT Management
Roadmaps
Electrical Engineering
Power Management
IC
Internal Communications
Integrated Circuit
Boost
Optimization
Analog Circuits
Physics
Innovation
Patents
Cadence
Integrated Circuit Design
Modeling
MATLAB
Simulink
Manufacturing
Communication
Tier 1

Summary

Job Responsibility:

Architect, model, and define sub-system specifications for advanced power management solutions, including: DC-DC converters (inductive and capacitive), LDOs, shunt regulators, and multi-rail PMIC architectures
Translate system-level specifications into elegant, robust, and cost-effective silicon solutions Lead end-to-end design of power management circuits, including: High-current power stages and advanced packaging-aware design, Loop stability, transient performance, and efficiency optimization
Define architecture and provide detailed design specifications to global teams; lead and mentor junior design engineers
Develop system and behavioral models (MATLAB/Simulink, Verilog-A/AMS) to validate architecture, loop stability, and system performance
Drive and participate in critical design reviews and ensure design quality, robustness, and manufacturability
Serve as the PMIC technical lead and primary interface to Tier-1 customers, driving technical discussions and alignment
Collaborate cross-functionally with system, layout, product, test, packaging, and quality teams to ensure successful product execution
Provide technical leadership for innovation strategy, including proposing and reviewing long-term roadmap and new architectures
Drive differentiated innovation and contribute to patentable solutions for next-generation power management products

Job Qualification:

MS in Electrical Engineering with 12+ years of experience, or PhD with 10+ years of experience in power management IC development
Proven expertise in power conversion topologies: Buck, boost, buck-boost, charge pumps, LDOs, and multi-phase architectures
Strong understanding of control techniques: Current-mode, voltage-mode, hysteretic control, and loop compensation
Deep experience in high-current power stage design, including advanced packaging and parasitic-aware design
Expertise in power integrity modeling and analysis (frequency/time domain), simulation optimization, and silicon correlation
Strong foundation in analog design, control theory, and device physics
Demonstrated ability to develop novel architectures and drive innovation, including patent generation
Hands-on experience with Cadence IC design tools (Virtuoso, Spectre) and modeling environments (MATLAB/Simulink)
Proven track record of delivering products from concept to high-volume manufacturing
Excellent communication skills and experience working with global cross-functional teams and Tier-1 customers

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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Dice Id: appfeed
Position Id: 25765_547372854
Posted 18 hours ago

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