VARITE is looking for a qualified “FPGA / RTL Design Engineer” in San Jose, CA

WHAT THE CLIENT DOES?
A major multinational conglomerate, commanding leadership in Engineering, Procurement, and Construction (EPC) projects, Hi-Tech Manufacturing, and Services. As of 2024–2025, it is a $27–30 billion USD entity operating in over 50 countries. It is often considered an industrial backbone, involved in critical, large-scale nation-building projects.

WHAT WE DO?
Established in the Year 2000, VARITE is an award-winning minority business enterprise providing global consulting & staffing services to Fortune 1000 companies and government agencies. With 850+ global consultants, VARITE is committed to delivering excellence to its customers by leveraging its global experience and expertise in providing comprehensive scientific, engineering, technical, and non-technical staff augmentation and talent acquisition services.

Job Title: FPGA / RTL Design Engineer
Location: San Jose, CA
Contract Duration: 6 Months
Pay Rate Range: $60.00 /hr. - $70.00/hr. on W2

HERE'S WHAT YOU’LL DO:

Key Responsibilities / Duties:
Job Description:

Job Description:

FPGA/RTL Design Engineer to design, implement, and validate digital circuits and FPGA-based solutions. This role involves hands-on development using RTL languages, FPGA design tools, and simulation environments, while also supporting customers and creating technical assets that enable successful adoption of our products.

Key Responsibilities

Design & Implementation: Develop RTL code (Verilog, VHDL, SystemVerilog) for FPGA and digital circuits, integrating IP and system software.
Simulation & Debugging: Perform functional simulation, debug FPGA designs, and resolve design issues.
Validation & Testing: Create unit tests, example designs, and demos; ensure readiness of feature releases.
Technical Enablement: Develop user guides, application notes, and training materials for customers.
Customer Support: Respond to technical inquiries, reproduce issues, and collaborate with engineering teams for resolution.
Optimization: Conduct synthesis, power, and thermal analysis to meet performance and efficiency targets.
Collaboration: Work closely with architecture, verification, and physical design teams to deliver high-quality solutions.

Minimum Qualifications

BS in Electrical/Computer Engineering or related field.
5+ years of experience in FPGA design, RTL development, or applications engineering.
Proficiency in FPGA design tools and third-party simulators.
Strong debugging skills and experience with FPGA development boards.
Expertise in RTL design using Verilog, VHDL, or SystemVerilog.

Preferred Qualifications

Experience with power/thermal analysis tools.
Scripting skills (TCL, Python).
Strong problem-solving and analytical abilities.

If this opportunity interests you, please respond by clicking on EasyApply.

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VARITE is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status.

FPGA / RTL Design Engineer

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