Verification Planning & Strategy (40%)
Develop comprehensive verification plans and test plans for NPU functional blocks and system-level integration
Define verification milestones, coverage goals, and success criteria aligned with project requirements
Create verification strategies for AI-specific workloads including convolution engines, matrix multiply units, and activation functions
Testbench Development & Implementation (40%)
Design and implement System Verilog/UVM testbenches for complex NPU verification
Develop constrained random test generators for neural network inference pipelines
Create reference models and checkers for AI workload validation
Build verification environments for memory subsystems, DMA controllers, and system interconnects
Implement functional and code coverage collection and analysis methodologies
System Integration & Performance Verification (20%)
Verify AXI4/AHB protocol compliance and system-level interfaces
Validate timing, throughput, and power consumption requirements
Develop and maintain regression test suites for continuous integration
Collaborate with software teams on hardware-software co-verification
Support FPGA prototyping and emulation platforms for system validation
Ensure compliance with automotive safety standards (ISO 26262) and functional safety requirements
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