EDVT (Electrical Design Verification Test) Engineer

San Jose, CA, US • Posted 2 days ago • Updated 2 days ago
Full Time
No Travel Required
On-site
Depends on Experience
Fitment

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Job Details

Skills

  • CPU
  • Tcl
  • Python
  • Testing
  • Computer Hardware
  • ASIC
  • FPGA

Summary

Position: EDVT (Electrical Design Verification Test) Engineer
Location: 
San Jose, CA (Onsite)
 
Role & Responsibilities:
  • Participate in a project team of engineers involved in specifying, designing, developing, and testing hardware. Define unit and system level test processes and procedures.
  • Perform complex system level unit and integration tests
  • Debug and mitigate complex system level issues.
  • Collaborate closely with hardware design engineers, software/diagnostic engineers, and manufacturing test engineers to determine product test strategy, develop necessary scripts, test products, and drive issues to resolution for successful release to manufacturing.
  • Debug complex issues at both system and component levels, including CPU, ASICs, FPGAs, power supplies, etc.
  • Leverage automation to implement test strategy and improve productivity.
  • Provide detailed issue mitigation and drive issues to closure.
  • Document test plans, procedures, and test reports.
  • Assist with root cause analysis of field issues and support customer escalations.
Minimum Qualifications:
  • BSEE/CE with 0-1 years of experience.
  • Hands-on experience with electrical test and measurement equipment.
  • TCL/Python or similar scripting experience is a plus.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 91166803
  • Position Id: 8911414
  • Posted 2 days ago
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