San Jose, California
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Job Title: FPGA / RTL Design Engineer Location: San Jose, CA Job Description: FPGA/RTL Design Engineer to design, implement, and validate digital circuits and FPGA-based solutions. This role involves hands-on development using RTL languages, FPGA design tools, and simulation environments, while also supporting customers and creating technical assets that enable successful adoption of our products. Key Responsibilities Design & Implementation: Develop RTL code (Verilog, VHDL, System Verilog) for
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Full-time
$100,000 - $110,000