Sunnyvale, California
•
2d ago
Position: Hardware Design Engineering Advanced Packaging Location: Sunnyvale CA Onsite Key Responsibilities Perform SI/PI analysis and design optimization for advanced silicon packages (CoWoS, EMIB, chiplet-based architectures, fan-out wafer-level packaging) Develop and validate high-speed channel models for package interconnects including bumps, microbumps, TSVs, RDL layers, and silicon/organic interposers Conduct full-wave electromagnetic (EM) simulations of package structures to character
Easy Apply
Third Party, Contract
Depends on Experience