ASIC jobs in Milpitas, CA

Physical Design Engineer Semiconductor / ASIC

Hybrid in Palo Alto, California

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Today

Physical Design Engineer Semiconductor / ASIC Location: Palo Alto, CA (100% Onsite) Openings: 5 Job Overview We are looking for an experienced Physical Design Engineer with strong hands-on expertise in end-to-end ASIC physical design and advanced semiconductor process nodes. The ideal candidate must have exposure to TSMC 2NP/3NP technology and proven experience in physical implementation, timing closure, power optimization, and physical verification. Key Responsibilities Execute the complete phy

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Contract

$70 - $90

ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs

Cupertino, California

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Today

Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We have data center locations in the U.S., Europe, Singapore, and Japan, and customers across all industries.Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you?ll be responsible for the design and optimization of h

Full-time

2027 Masters ASIC Package Engineering Co-op/Intern

Santa Clara, California

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Today

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you're designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Joi

Full-time

USD 104,000.00 per year

2027 Undergrad ASIC Package Engineering Co-op/Intern

San Jose, California

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Today

Full-time

USD 66,560.00 per year

ASIC Emulation Engineer

Santa Clara, California

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Today

Full-time

USD 145,600.00 per year

ASIC Gen-AI Data Scientist

San Jose, California

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation f

Full-time

USD 145,000.00 - 336,000.00 per year

ASIC Verification Engineer

San Jose, California

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Today

At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale. Cornelis Networks delivers the world's highest performance scale-out networking solutions for AI and HPC datacenters. Our d

Full-time

Senior ASIC Verification Automation Engineer

San Jose, California

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Today

Full-time

Senior ASIC Verification Engineer

San Jose, California

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Today

Full-time

Senior Chip Lead Engineer-SoC/ASIC

San Jose, California

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Today

Full-time

USD 143,500.00 per year

Sr. Staff Engineer, ASIC Design

San Jose, California

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Today

Sr. Staff Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged o

Full-time

USD 180,000.00 - 223,000.00 per year

Engineering Intern - AI/ML ASIC CAD (Spring 2027 Co-Op)

Palo Alto, California

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Today

About Rivian Rivian is on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract. As a company, we constantly challenge what's possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it

Full-time

USD 45.00 - 51.00 per hour

ASIC DFT Engineer

Palo Alto, California

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Today

Full-time

Compensation information provided in the description

ASIC/FPGA Design and Verification Engineer - Space Electronics - MTV (Associate, Experienced, or Lead)

Mountain View, California

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Today

ASIC/FPGA Design and Verification Engineer - Space Electronics - MTV (Associate, Experienced, or Lead) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers to join us as part of our Boeing Electronic Products team at the heart of Boeing's products in Mountain View, CA. From complex digitally beamformed phased arrays for constellation satellite programs to computing and networking eq

Full-time

USD 98,600.00 - 133,400.00 per year

Engineering Intern - ASIC DFT (Spring 2027 Co-Op)

Palo Alto, California

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Today

Full-time

USD 45.00 - 51.00 per hour

ASIC/FPGA Design and Verification Engineer - Space Electronics - (Senior or Principal) - MTV

Mountain View, California

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Today

ASIC/FPGA Design and Verification Engineer - Space Electronics - (Senior or Principal) - MTV Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC/FPGA Design and Verification Engineers (Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Mountain View, CA. From complex digitally beamformed phased arrays for constellation satellite programs to comput

Full-time

USD 164,900.00 - 223,100.00 per year

ASIC Engineering Technical Leader

San Jose, California

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Today

Role: ASIC Engineering Technical Leader Location: San Jose, CA (Onsite) Start Date: Immediate Type: Contract (C2C/W2) Interview: Phone/Video We are seeking an ASIC Engineering Technical Leader with strong expertise in DesignforTest (DFT) for nextgen optical communication ASICs. Responsibilities include DFT architecture implementation, scan insertion, ATPG pattern generation, silicon debug, integration/verification of DFT fabrics, gatelevel simulations, and automation using Python/Tcl/C++.

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Full-time, Part-time, Third Party, Contract

ASIC/SOC DFT Engineer (Silicon Engineering)

Palo Alto, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's

Full-time

USD 135,000.00 - 175,000.00 per year

ASIC DESIGN LEAD / SENIOR CHIP DESIGN ENGINEER

Remote

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Today

ASIC CHIP LEAD ASIC Design Lead / Senior Chip Design Engineer What Youll Do Architecture and Chip Definition Lead ASIC architecture development from high-level requirements and block diagrams. Work with system architects to define chip functionality, interfaces and performance goals. Write detailed specifications for chip components and subsystems. RTL Design and Synthesis Develop RTL designs and run synthesis with Synopsys Design Compiler. Tune RTL for power, performance and area. Design, imp

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Contract

100+

ASIC Verification Engineer (UVM & GLS Focus)

Remote

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9d ago

Job Description: Must-Have Skills Strong end-to-end UVM expertise with hands-on experience building verification environments from scratch, including testbench architecture, agents, sequences, monitors, scoreboards, checkers, assertions, coverage models, and regression automation.Extensive Gate-Level Simulation (GLS) experience including SDF annotation, timing validation, X-propagation analysis, reset/clock synchronization issues, power-up sequence validation, and debug of post-synthesis/post-la

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Contract

Depends on Experience

ASIC jobs in Milpitas, CA 95035, USA