EMIR jobs in Santa Clara, CA

Santa Clara, California

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Today

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you're designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Joi

Full-time

USD 175,000.00 per year

Physical Design Engineer – Lead

San Jose, California

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14d ago

Position: Physical Design Engineer Lead Locations: San Jose, San Diego, Irvine, CA (Onsite) What You Will Do: Drive ASIC physical design implementation from floorplanning through signoff. Perform Place & Route (PnR), Clock Tree Synthesis (CTS), timing closure, and optimization. Achieve Power, Performance, and Area (PPA) targets. Develop and validate timing constraints and perform Static Timing Analysis (STA). Execute LEC, VCLP, and EMIR signoff activities. Collaborate with cross-functional

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Full-time

Depends on Experience

Sr. Principal Product Engineer

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This Senior Principal Product Engineer is a technical leader on the Voltus product engineering team, working on Cadence's power noise and reliability analysis platform. The role sits between strategic customers/foundries, Applications, and R&D, and is accountable for turning the hardest IR/EM, PDN, and electrothermal signoff requirements into product and flow solutions. Key responsibil

Full-time

USD 161,000.00 - 299,000.00 per year

CPU Server Floorplan and Integration Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: Qualcomm Data Center team is developing High performance, Energy efficient server solution for data center applications. We are looking for highly talented, innovative, teamwork-oriented individuals for our cutting-edge technology work! Our Mission We are dedicated to transforming the industry by reimagining silicon and developing next-generation computing platforms. By joini

Full-time

USD 147,900.00 - 221,900.00 per year

Principal/Senior Principal Engineer - Physical Design Implementation and Signoff Methodology

San Jose, California

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Today

Job Details: Job Description: About Altera Altera builds the programmable logic and adaptive computing solutions that power the world's most demanding systems - from data centers and networking infrastructure to automotive, aerospace, and industrial applications. As an independent FPGA leader, we combine decades of silicon expertise with a startup's focus on speed and innovation. Our engineers work at the edge of process technology and design methodology to deliver silicon that customers can t

Full-time

USD 231,500.00 - 341,075.00 per year

CPU Physical Electrical Analysis Engineer, Santa Clara/Austin

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: Our Mission We are dedicated to transforming the industry by reimagining silicon and developing next-generation computing platforms. By joining our team, you'll collaborate with world-class engineers to create innovative solutions that push the limits of performance, energy efficiency, and scalability. Our focus is on developing server-class high performance CPU solutions tha

Full-time

USD 209,300.00 - 313,900.00 per year

ASIC Implementation Engineer PD

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom is searching for an ASIC top level floorplan Physical Design Engineer to join the Asic Products Division. This position involves working with the latest technology to continue driving next generation Artificial Intelligence and PCIe Switch Pro

Full-time

USD 121,900.00 - 195,000.00 per year

Physical design Engineer

Mountain View, California

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14d ago

Position 1 Physical Design Engineer Mountain View CA (onsite - Hybrid) Mode of hiring: Fulltime permanent Customer wants someone who is having some logical design experience along with PD experience. Having some RTL2PD flow skills such as CDC/RDC/VCLP is preferred. Having some exposure of logic design is also preferred. Canddiate doesn't have to do the logic design, but needs to review the synthesis/PNR report to analyze for the timing/LoL optimization Provides services in transforming the RTL d

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Full-time

$120,000 - $140,000

EMIR jobs in Santa Clara, CA, USA