Entry Level Physical Design Engineer jobs

San Francisco, California

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Today

Job Title: Physical Design Engineer Location: San Francisco, CA (Bay Area) Good understanding of Cadence tools (Innovous, Quantus, Voltus). (Must) Deep knowledge about industry standards in Physical Design, Physical aware synthesis, Floorplanning, CTS and place and route. Experience in developing and implementing Power-grid and high speed clock constraints and specifications. Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip and block level. Exp

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Third Party, Contract

SoC Physical Design Engineer (10+ Yrs)

Folsom, California

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Today

SoC Physical Design Engineer (10+ Yrs) Folsom, CA 2 + Months Experience: 10+ Years Responsibilities: Full Flow: RTL/netlist to tapeout. Execution: Floorplanning, CTS, routing, timing closure, and physical verification. Optimization: Meet PPA targets using EDA tools and automation scripts. Requirements: 10+ years of hands-on SoC physical design experience. Dexian stands at the forefront of Talent + Technology solutions with a presence spanning more than 70 locations worldwide and a team

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Third Party, Contract

$90 - $100 per hour

Physical Design Engineer (Synthesis, STA & Floorplanning)

California

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Today

Fulltime Location: Bay Area Visa - Stamped H1B, s. Note: Stamped H1B engineers, who are currently in India and are willing to join us immediately can also be considered. Job Description Physical Design Engineer (Synthesis, STA & Floorplanning) Strong experience in RTL synthesis using Cadence Genus, including SDC constraint development and QoR optimization (timing, area, power) Hands-on expertise in Static Timing Analysis using Cadence Tempus, including setup/hold closure, C scenarios, OCV, an

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Full-time

Staff Physical Design Engineer

Sunnyvale, California

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18d ago

Required Qualifications: Bachelor s/Master s degree in Electrical Engineering or related field8 12 years of experience in ASIC physical designProven experience in full-chip or large block implementation and tapeoutsStrong expertise in:Floorplanning and power planningPlacement, CTS, routing, and physical verificationStatic Timing Analysis (STA) and timing closureHands-on experience with industry-standard tools such as: Synopsys ICC2 / Cadence InnovusSynopsys PrimeTimeMentor CalibreExperience with

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Third Party, Contract

Depends on Experience

Physical Design Engineer (UPF)

Remote

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Yesterday

Title: Physical Design Engineer (UPF) Duration: 3-4 months Location: Remote May need to accommodate some calls with Europe Work Schedule: M-F, 40 hours a week Start Date: 9/21 Project Details: Perform Netlist-to-GDS Physical Design including Place-and-Route, Extraction, STA, Timing/SI/Power/EM/IR analysis & closure and Physical Design Verification (LVS/DRC) Proficiency in using Synopsys tool suites (DC, PT, ICC2) and Calibre for physical verification Adequate programing/scripting skills i

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Contract, Third Party

70 - 85

Physical Design Engineer

Mountain View, California

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4d ago

Physical Design Engineer (PnR / PPA / Timing Closure) Mountain View CA Open to Both FTE and Contract Option Salary: Market We are looking for a Physical Design Engineer with strong expertise in Place & Route (PnR), Power-Performance-Area (PPA) optimization, and timing convergence for advanced technology nodes. Key Responsibilities Drive block-level physical design implementation from netlist to GDSII. Perform floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and p

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Full-time

$120000 - $165000

Physical Design Engineer

Oakland, California

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Today

Physical Design Engineer Bay Area,CA (onsite) Longterm Contract Good understanding of Cadence tools(Innovous,Quantus,Voltus).Deep knowledge about industry standards in Physical Design, Physical aware synthesis,Floorplanning,CTS and place and route.Experience in developing and implementing Power-grid and high speed clock constraints and specifications.Experience with CDC,static timing analysis methodologies and relevant tools.Understanding and experience of mixed signal environments is a must.Can

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Contract, Third Party

$70 - $80

Physical Design Engineer & DV Engineers

Sunnyvale, California

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Today

Job Title:PhysicalDesignEngineer(PD/PnR) Location Bay Area CA / Austin TX (Hybrid) Job Summary Seeking aPhysicalDesignEngineerwith strong hands-on experience in block-level and top-level Place & Route using Synopsys Fusion Compiler. The candidate will be responsible for implementation, timing closure, low-power integration, and signoff activities for complex SoCdesigns. Key Responsibilities Perform block-level and top-levelPhysicalDesignimplementation using Fusion Compiler. Drive floorplannin

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Full-time

160,000 - 170,000

ASIC Physical Design Engineer

Lafayette, Indiana

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15d ago

Were hiring for a full-time opportunitywith a leading semiconductor end client in Lafayette, IN. Seeking experienced ASIC Physical Design / Backend Engineers with strong TSMC FinFET tapeout and signoff experience.. Detailed job description is given below. Title:ASIC Physical Design Engineer (TSMC / FinFET) Location: Lafayette, Indiana (Relocation assistance provided) Type: Full time with Client Tapeout , Signoff , DRC/LVS/PEX,Customer interaction Job Responsibilities: Act as the primary inter

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Full-time, Third Party

Depends on Experience

Entry Level Mechanical Design Engineer

San Diego, California

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Today

Move Forward with Volt! Volt is immediately hiring for an Entry Level Mechanical Design Engineer in San Diego, CA. As an entry level Mechanical Design Engineer, you will: Create and maintain the Mechanical and Systems composite product design Can cover one or more of composite disciplines; electrical, hydro-mechanical, controls manufacturing, software and display, This position is aimed at the maintenance of Mechanical and Hydro-Mechanical product design This is a Full-Time Temp to Hire opportun

Full-time

USD 30.00 - 32.00 per hour

Senior ASIC Physical Design Engineer

Laurel, Maryland

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Today

Description Do you love building and prototyping robust electrical systems? Are you passionate about providing real impact to the country?s toughest national security problems? If so, we\'re looking for someone like you to join our team at APL. The Miniature Device Technologies Group develops highly customized tools and techniques required to carry out missions around the globe. Whether it be a quick reaction need from the field or the long-term development of a novel capability, we work hand

Full-time

Physical Design Engineer- senior

Austin, Texas

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Today

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what\'s possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (bloc

Full-time

Compensation information provided in the description

CPU Physical Design Engineer, San Diego

San Diego, California

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Today

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > CPU Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what\'s possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm CPU Engineer, you will lead innovative Central Processing Unit (CPU) design efforts that have a critical impact on industries across the world. Qualcomm Engine

Full-time

Compensation information provided in the description

Physical Design Engineer II (IC)

San Jose, California

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Today

Position:Physical Design Engineer II (IC) Job Description:Job Responsibilities: Execute synthesis, PNR, and STA for assigned partitions of ASIC chip adhering to strict schedules and design goals.Work closely with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues across your blocks.Help close EM/IR, drive LEC and physical verification signoff for your partitions in coordination with methodology owners.Partner with the design team to proactively identify and

Full-time

Compensation information provided in the description

Managing Director: Physical Design Engineer

Dallas, Texas

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2d ago

Ready to make a difference? We are seeking a Department Manager, Substation Physical Engineering to lead and grow our substation engineering practice. In this leadership role, you will be responsible for the operational management, technical oversight, staff development, financial performance, and strategic growth of a department delivering substation physical engineering services to utility clients nationwide. You will provide leadership to a multidisciplinary team of substation physical engine

Full-time

USD 174,701.00 - 296,992.00 per year

AI Silicon Physical Design Engineer

Sunnyvale, California

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Today

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprise

Full-time

USD 150,000.00 - 250,000.00 per year

Entry Level Mechanical Design Engineer

San Diego, California

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Today

Full-time

USD 30.00 - 32.00 per hour

Junior Engineer (Design)

New York, New York

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Today

Company Description Job Description Hours: Full-Time - 35 Hours Work Location: 30-30 Thomson Avenue, LIC, NY 11101 Only candidates who are permanent in the Civil Engineering Intern title or those who are reachable on the open-competitive list (exam #5047) or filed for the open-competitive exam #6116 may apply. Please indicate a copy of your Notice of Result card or indicate if you are already permanent in the title. If you do not meet the previously mentioned civil service criteria, you will

Full-time

USD 60,000.00 - 70,000.00 per year

Physical Security Design Engineer

Remote

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Today

A professional organization is seeking a Physical Security Design Engineer for a remote role This position focuses on creating detailed physical security drawings and documentation for internal security projects, with occasional onsite visits as needed. About the Opportunity: Schedule: Monday through Friday Hours: Standard business Setting: Remote (EST or CST) Responsibilities: Create and maintain security system drawings using AutoCAD and Revit Develop detailed layouts for access control, CCTV

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Contract

$40 - $40 per hour

Entry Level Mechanical Design Engineer

Lafayette, Indiana

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Today

RFA Engineering ( is an engineering service provider dedicated to delivering our clients with timely engineering support and expertise. We are seeking an Entry Level candidate to become an integral part of our engineering team. The selected candidate will work with an experienced engineering staff using state-of-the-art engineering tools & processes. This position will operate onsite at our customer's world-class engineering and manufacturing facility. This is a full-time position with a full b

Full-time

USD 65,000.00 - 75,000.00 per year