RTL jobs in Irvine, CA

Remote

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Today

This is Ganesh from DELLA INFOTECH INC. We have an outstanding opening for you for the opportunity below. Please check the job description and share your updated resume, if you are interested. Job Title : SoC / RTL Integration Engineer Location : Remote Good in understanding RTL Design and Digital concepts Subsystem or SoC integration Integration 1P and 3P IP's, generating 3P fabrics, quality checks and PD handoff etc. SS integration using Verilog/system Verilog, synthesis, timing constraints,

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Contract

70 - 75

Physical Design Engineer

Irvine, California

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Today

Locations:San Jose, CA / San Diego, CA / Irvine, CARequired Skills Strong experience withCadence Innovus.Expertise in the complete Physical Design cycle fromRTL to Tape-out.Hands-on experience in:SynthesisStatic Timing Analysis (STA)Timing ClosurePlace & RouteClock Tree Synthesis (CTS)FloorplanningPhysical VerificationEM/IR AnalysisStrongTCL and/or PERL scriptingskills.

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Full-time

Depends on Experience

Wireless SoC RF Integration and Validation Engineer

Irvine, California

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Today

Come and join Apple's growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verifi

Full-time

RFIC Layout Engineer

Irvine, California

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Today

Do you have a passion for invention and self-challenge? Do you thrive with pushing the limits of what's considered feasible? As part of an outstanding `team, you'll craft sophisticated, groundbreaking projects that deliver more performance in our products than ever before. You'll work across fields to transform improved hardware elements into a single, coordinated design. Join us, and you'll help us innovate new technologies that continually outperform the previous iterations! By collaborating w

Full-time

AMS Verification Engineer (RFIC Engineering)

Irvine, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. AMS VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the wor

Full-time

USD 125,000.00 - 160,000.00 per year

FPGA/ASIC Design Engineer (Silicon Engineering)

Irvine, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the worl

Full-time

USD 125,000.00 - 160,000.00 per year

ASIC DESIGN LEAD / SENIOR CHIP DESIGN ENGINEER

Remote

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Today

ASIC CHIP LEAD ASIC Design Lead / Senior Chip Design Engineer What Youll Do Architecture and Chip Definition Lead ASIC architecture development from high-level requirements and block diagrams. Work with system architects to define chip functionality, interfaces and performance goals. Write detailed specifications for chip components and subsystems. RTL Design and Synthesis Develop RTL designs and run synthesis with Synopsys Design Compiler. Tune RTL for power, performance and area. Design, imp

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Contract

100+

ASIC Design Lead / Senior Chip Design Engineer

Remote

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Yesterday

Role:ASIC Design Lead / Senior Chip Design Engineer Location:REMOTE Duration: 12 months Contract Job Description What Youll Do Architecture and Chip Definition Lead ASIC architecture development from high-level requirements and block diagrams. Work with system architects to define chip functionality, interfaces and performance goals. Write detailed specifications for chip components and subsystems. RTL Design and Synthesis Develop RTL designs and run synthesis with Synopsys Design Compiler. Tun

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Contract

95 - 105

Senior FPGA Verification Engineer, Air Dominance and Strike

Costa Mesa, California

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7d ago

Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and c

Full-time

USD 166,000.00 - 220,000.00 per year

FPGA Verification Engineer, Air Dominance and Strike

Costa Mesa, California

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7d ago

Full-time

USD 146,000.00 - 194,000.00 per year

DFT MBIST Staff Engineer

Remote

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Today

Position Summary: We are looking for a highly experienced Senior MBIST Contractor to join our SoC Design-for-Test (DFT) team. The role is focused on hands-on Memory BIST implementation using Synopsys MBIST (SMS). The ideal candidate is an independent contributor who can own the complete MBIST flow from insertion through verification, simulation, pattern generation, and Silicon bring-up with minimal supervision. Responsibilities: Perform MBIST insertion for complex SoC designs using Synopsys SMS

Contract

USD70.0/HOURLY - USD80.0/HOURLY

Electrical Test Engineer, Intelligence Systems

Santa Ana, California

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7d ago

Full-time

USD 129,000.00 - 171,000.00 per year

DFT MBIST Staff Engineer

Remote

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8d ago

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Third Party, Contract

90 - 100

DFT (Design For Test) Lead - Remote Role

Remote

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Today

Role: ASIC DFT (Design for Test) LeadLocation: RemoteDuration: 12+ months (possibly extending longer based on project timelines)Candidate Responsibilities:Responsible for implementing the Hardware Design-for-Test (DFT) features - scan, mbist, BISR, boundary scan, setting up/debugging DFT simulations and supporting post-silicon testing/debugResponsible for development of innovative DFT IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with t

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Contract

Depends on Experience

Physical Design Engineer GPU / High-Performance SoC

Remote

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Today

Job Title: Physical Design Engineer GPU / High-Performance SoC Location: Mountain View, CA (Full Onsite) Openings: 2 Job Description We are looking for an experienced Physical Design Engineer with hands-on experience in advanced semiconductor process nodes, particularly TSMC 3nm and/or 2nm, for high-performance SoC, GPU, or similar complex chip designs. The ideal candidate will have strong end-to-end physical design experience, from netlist to GDSII, along with expertise in PPA optimization, tim

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Contract

$60 - $80

SOC/IP Integration Engineer (eInfochips Inc)

Remote or California

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Today

Position: SOC/IP Integration Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Good in understanding RTL Design and Digital conceptsSubsystem or SoC integrationIntegration 1P and 3P IP's, generating 3P fabrics, quality checks and PD handoff etc.SS integration using verilog/system verilog, synthesis, timing constraints, floor-planning considerations, performance optimization, and design-quality closure including CDC, Lint, and RDC, register integration.Ensure customer satisfaction

Full-time

DV CAD Engineer

Remote or California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: As a CAD Engineer focusing on the methodology and support of RTL design verification, you will work with architecture, design, software and verification leads to develop technology critical to the development of our products. You will be involved from conception to final creation and every step along the way. Roles and Responsibilities Work with chip leads to understand the

Full-time

USD 186,700.00 - 280,100.00 per year

Principal DFT Engineer (Silicon Engineering)

Irvine, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. PRINCIPAL DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world'

Full-time

USD 210,000.00 - 340,000.00 per year

Principal Power Architect

Remote or California

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Today

Description Invent the future with us. Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications. Join us at Ampere and work alongside a passionate and growing team - we'd

Full-time

USD 182,000.00 - 273,000.00 per year

Distinguished Power Architect

Remote or California

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Today

Full-time

USD 279,500.00 - 419,500.00 per year

RTL jobs in Irvine, CA, USA