Timing Closure jobs in Carrollton, TX

Richardson, Texas

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Today

Req ID: 141446 Region: Americas Country: USA State/Province: Texas City: Richardson Summary Celestica is seeking a highly motivated and self-driven candidate qualified for the position of Senior Staff, FPGA Engineer to help design and build market-leading Hardware Platform Solutions. As a Subject Matter Expert and a member of the design and development group, the successful candidate will be responsible for developing FPGA designs. They will participate in the full FPGA development flow, in

Full-time

Senior FPGA Engineer

Carrollton, Texas

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7d ago

Senior FPGA Engineer Carrollton, TX - Relocation Assistance Provided The Company Our client is a global leader in aviation technology, specializing in cabin systems integration for business and commercial aircraft. They design their audio, video, lighting, and entertainment systems completely in-house, from concept through production and support. The Job Our client's design engineering team is responsible for the FPGA design and development of both prototype and production units across thei

Full-time

FPGA Firmware Engineer

Richardson, Texas

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Today

Overview Continental Electronics Corporation is a leading provider of RF technologies and innovative solutions with 80 years of proven performance. CEC has experienced significant recent growth and has established itself as the go-to supplier for a diversified product line supporting a wide spectrum of markets from commercial products, military customers, to space research laboratories. We are seeking an FPGA Firmware Engineer to design, verify, and integrate FPGA-based DSP and control functio

Full-time

USD 131,000.00 - 150,000.00 per year

Physical Design Engineer GPU / High-Performance SoC

Remote

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Today

Job Title: Physical Design Engineer GPU / High-Performance SoC Location: Mountain View, CA (Full Onsite) Openings: 2 Job Description We are looking for an experienced Physical Design Engineer with hands-on experience in advanced semiconductor process nodes, particularly TSMC 3nm and/or 2nm, for high-performance SoC, GPU, or similar complex chip designs. The ideal candidate will have strong end-to-end physical design experience, from netlist to GDSII, along with expertise in PPA optimization, tim

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Contract

$60 - $80

Senior Principal Engineer

Remote or San Jose, California

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Today

Job Details: Job Description: Altera is looking for a Senior Principal Engineer to serve as a key technical leader responsible for defining and advancing FPGA physical synthesis, timing optimization, and implementation methodologies. This individual will bring deep expertise in EDA algorithms, optimization engines, design compilation, and performance-driven implementation technologies. The ideal candidate will have a proven track record of architecting and delivering breakthrough technologies

Full-time

USD 231,500.00 - 304,500.00 per year

Principal Engineer Digital Design

Dallas, Texas

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Today

#WeAreIn for jobs that impact everyone's life.What if your ideas could change the way the world connects, powers up, or thinks?As a Lead Principal Engineer Digital Design in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.Are you in? Your Role Key responsibilities in your new role Implement DSP algorithms (e.g., Filtering, Error Cor

Full-time

USD 175,300.00 per year

Asics Engineer

Remote

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Today

Requirements please see these key words of in the project description for the profile consideration. "SCAN, ATPG, MBIST, Timing Simulations, SDF, SDC , PSV, Diagnosys , Pattern Retargeting , Pattern porting, DRCs, TetraMax, DFTMax " Experience 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requir

Full-time

Physical Design Engineer

Remote

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Today

Job Title: Physical Design Engineer Location: Remote We are looking for a Physical Design Engineer with hands-on experience in TSMC 3nm/2nm at SOC for cutting-edge GPU / High-Performance designs. Key Responsibilities: 1. Own Netlist-to-GDSII for high-speed, low-power SOC 2. Floorplanning, Placement, CTS, Routing, Timing closure 3. Drive PPA optimization - Power, Performance, Area for 2nm/3nm 4. Handle advanced nodes issues: IR Drop, EM, Crosstalk etc 5. Hands on experience on tools - Synopsys F

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Third Party, Contract

$60+

Lead ASIC DFT Staff Engineer

Remote

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8d ago

Required Skills & Qualifications: Strong hands-on experience in ASIC DFT with end-to-end ownership.Solid understanding of DFT fundamentals, fault models, test techniques, and test coverage concepts.Deep expertise in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug.Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools.Proven experience in scan insertion, ATPG setup, simulation, debug, and DRC analysis.Experience with MBIST implementation and verific

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Third Party, Contract

90 - 100

Lead ASIC DFT Staff Engineer

Remote

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Today

Job Description: Key Skills : "SCAN, ATPG, MBIST, Timing Simulations, SDF, SDC , PSV, Diagnosys , Pattern Retargeting , Pattern porting, DRCs, TetraMax, DFTMax " Experience: 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary: We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertio

Contract

USD70.0/HOURLY - USD80.0/HOURLY

Sr FPGA Engineer

Richardson, Texas

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Today

Overview Continental Electronics Corporation is a leading provider of RF technologies and innovative solutions with 80 years of proven performance. CEC has experienced significant recent growth and has established itself as the go-to supplier for a diversified product line supporting a wide spectrum of markets from commercial products, military customers, to space research laboratories. The Sr. FPGA Engineers who will design, test, and integrate complex FPGA-based digital signal processing and

Full-time

USD 150,000.00 - 163,000.00 per year

Staff SoC DFT Engineer, HBM

Richardson, Texas

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern d

Full-time

USD 146,000.00 - 247,000.00 per year

Senior Staff GPU Physical Design Engineer

Remote

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Today

Job Description Title: Senior Staff GPU Physical Design Engineer Location: Austin, TX or San Jose, CA. onsite strongly preferred Need: GPU or high-performance SoC experience. Advanced node (?5nm). Full block ownership Position Summary We are seeking a Senior Staff GPU Physical Design Engineer for our client to work on the physical implementation of high-performance GPU and system-level IP, driving execution across synthesis, place-and-route, timing closure, and signoff for their advanced tech

Contract

Timing Closure jobs in Carrollton, TX, USA