Verification Engineer Jobs

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Software Verification Engineer

SAIC

Middletown, Rhode Island, USA

Full-time

Job ID: 2505872 Location: MIDDLETOWN, RI, US Date Posted: 2025-06-04 Category: Information Technology Subcategory: Embedded SW Engr Schedule: Full-time Shift: Day Job Travel: No Minimum Clearance Required: None Clearance Level Must Be Able to Obtain: Secret Potential for Remote Work: No Description SAIC is seeking Software Verification Engineers to support the US Navy in Middletown, RI. JOB DESCRIPTION: Performs software verification activities for a large test system containing deskt

Sr. ASIC Design Verification Engineer, Kuiper Modem DV Team

Amazon Kuiper Manufacturing Enterprises LLC

Austin, Texas, USA

Full-time

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.The Role:Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a wireless solution with few legacy constraints. The team works with c

Principal Design Verification Engineer

OSI Engineering, Inc.

San Jose, California, USA

Full-time

Principal Design Verification Engineer A leading chip and silicon IP provider focused on accelerating and securing data is looking to hire an outstanding Principal Design Verification Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This role offers the chance to work alongside top engineering talent on innovative products that push the boundaries of speed and data security. As a Principal Design Verification Engineer, you ll play a critical role in the development of MIC

Verification Engineer (Contractor)

Vigna Solutions Inc.

Remote

Contract

Role & Responsibilities Verification Ownership: Take charge of the verification triage for microprocessor components, contributing to the identification of functional and performance issues pre-silicon production. Implement best practices and innovative methodologies to ensure robust and efficient verification processes.Documentation and Communication: Thoroughly document verification issues, providing comprehensive insights for future reference and continuous improvement. Communicate progress e

CPU Verification ENgineer

TalentBridge

Menlo Park, California, USA

Contract

CPU/SOCS VERIFICATION ENGINEER Location: Menlo Park, CA 94025 ( 5 Days onsite ) Duration: 12 months + extension Job Summary: As a CPU Verification Engineer, you will be a key member of the design verification team at to deliver our high-quality next generation AI integrated, cloud-native server class SoCs. You will be responsible for defining verification strategies and architecting solutions for complex verification problems. You will partner with stakeholders in adjacent domains and enable

Silicon Verification Engineer 2

Dexian DISYS

Remote

Contract

Role: Silicon Verification Engineer 2 Location: 100% remote Duration: Till 9/30/2025 (Possible Extension : Yes) Summary: The main function of Silicon Verification Engineer is to be a part of the test-plan generation process, creating, testing, and implementing various verification plans. Job Responsibilities: Define, document, and implement a UVM verification environment including agents and scoreboards Write test plans and implement them by developing tests, test generators, test benches, che

Defense Sr. FPGA Design Verification Engineer with Secret Clearance

ZoeTech Staffing LLC

Columbia, Maryland, USA

Full-time

Job Description: Our defense client is seeking digital verification engineers to support our development of secure tactical communication products. The candidate will function primarily in an FPGA verification role, working in a cooperative team environment to verify and test embedded FPGA firmware for radio communication systems. Successful candidates must have familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard int

AMS Design Verification Engineer (Custom SC)

Texas Instruments

Dallas, Texas, USA

Full-time

Job Description Change the world. Love your job. This position offers a great opportunity to work on some of TI's most advanced custom products. As an AMS DV Engineer, you will have responsibility for driving design execution excellence across the company on projects for TI's largest customer. You'll work closely with design, systems, verification, characterization, test and product engineers to define, develop, and productize the best chip design for custom semiconductor devices. This role is

Verification Engineer

AdientOne LLC

Massachusetts, USA

Contract

Role: Verification Engineer Location: Boxborough MA 01719 | Hybrid Duration: 12+ months Note: Prefer experience with PSS language and UVM Job Description: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and ove

Design Verification Engineer

Avance Consulting

Austin, Texas, USA

Full-time

Job Description <>Key Responsibilities: Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code coverage Debug simulation failures and work closely with RTL designers to resolve

Design Verification Engineer

LeadStack, Inc.

No location provided

Full-time, Contract

Lead Stack Inc. is an award-winning, one of the nation's fastest-growing, certified minority-owned (MBE) staffing services provider of contingent workforce. As a recognized industry leader in contingent workforce solutions and Certified as a Great Place to Work, we're proud to partner with some of the most admired Fortune 500 brands in the world. TITLE: Design Verification Engineer LOCATION: San Jose CA/ Austin TX DURATION: 5+ Months with possible extension Rate: $90-$110/hr on W2 Job Descriptio

Systems Analysis and Verification Engineer - Costa Mesa, CA

R Systems, Inc.

Costa Mesa, California, USA

Contract

About R Systems: R Systems is a leading digital product engineering company that designs and develops chip-to-cloud software products, platforms, and digital experiences that empower its clients to achieve higher revenues and operational efficiency. Our product mindset and engineering capabilities in Cloud, Data, AI, and CX enable us to serve key players in the high-tech industry, including ISVs, SaaS, and Internet companies, as well as product companies in telecom, media, finance, manufacturing

FPGA/ASIC Verification Engineer

Russell, Tobin & Associates

No location provided

Contract

Job Title: FPGA/ASIC Verification Engineer Duration : 6 months with possible extension Pay range : $85-100/hr. on W2 (DOE) Location - Hybrid, Goleta, CA Client - Fortune 25 company. Work Schedule: Normal PST business hours, Monday - FridayProject Overview: The project relates to the design and verification of a custom controller for analog components. The controller has interfaces such as SPI, Ethernet and AXI to driven the internal components and send data. Overall Responsibilities: As a FPG

Sr. Systems Analyst & Verification Engineer - Onsite in Costa Mesa, CA

Dataflix Inc.

Costa Mesa, California, USA

Contract, Third Party

Overview: The Sr. Systems Analyst & Verification Engineer position projects focused on the delivery of Telematics and Connectivity Services solutions. You will interact with all levels and teams in the organization. As a Sr. Systems Analysis and Verification Engineer, you are responsible for development of the verification strategy (outline test methods, test facilities and align to product requirements) as well as reporting out on test readiness, test results and product technical risks of new

Design Verification Engineer - Sunnyvale, CA / Redmond, WA / Austin, TX

Aptiva Corp

Sunnyvale, California, USA

Full-time

Job Title: Design Verification Engineer Location: Sunnyvale, CA / Redmond, WA / Austin, TX Work Type: Full-Time, Onsite (Hybrid No Remote Allowed) Employment Type: Permanent (No Contractors) Experience Range: 7 to 18 Years (No profiles with over 18 years of experience) Key Responsibilities: Develop and maintain UVM/SystemVerilog-based verification environments for IP, subsystem, and SoC level. Understand design specifications and architectural documents to create effective test plans. Write and

Design Verification Engineer

AdientOne LLC

Massachusetts, USA

Contract

Role: Design Verification Engineer Location: Boxborough MA 01719 | Hybrid Duration: 7 months Job Description: Collaborate with team to verify complex IP blocks. Develop and execute tests. Debug issues related to functionality, performance, and power. Work on functional and/or code coverage closure. Requirements: Proven experience working in UVM and constrained-random simulation environments. Strong knowledge of System Verilog, Verilog, C/C++, and scripting languages. Familiarity with 3D pipelin

Mixed Signal Verification Engineer

Everest Consultants, Inc

Hillsboro, Oregon, USA

Full-time

Job Title: Mixed Signal Verification Engineer Duration: Permanent, Full-time Location: Hillsboro, OR (Hybrid: onsite 3 days per week) Pay Range: $101,000 to $170,000 per year **Candidates must have valid U.S. work authorization at the time of hire. Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals with a vision for the future, a desire to make an impact, and a drive to turn innovative ideas into reality. They are building d

Firmware Verification/Test Engineer (Blackbox)

Oxford Global Resources

Burnsville, Minnesota, USA

Contract

Title: Firmware Verification / Test Engineer (Blackbox) Location: Burnsville, MN OR Lincoln, NE 100% ONSITE.Preference is on local, will look at Nationals if a perfect fit Length of Contract: 8 Months Ideal Start: as early as 5/12 if we can get someone there Scope: They will need figure out what test cases need to be written, write the test case and then will be running / executing the test case and then integrating them into Azure Devops. This beltpack device contains a microphone and 3.5 au

Instrument Verification and Validation Engineer (Medical Device)

Caresoft

Rochester, New York, USA

Contract

Job Summary for Sr. Instrument Verification and Validation Engineer - Lead formal verification and validation (V&V) activities for complex medical devices in compliance with FDA regulations. - Design and implement software for embedded devices and systems, including developing, coding, testing, and debugging system software. - Develop and execute requirements-based manual test cases and procedures in a BL2 lab environment. - Analyze test results, document findings, and manage system software

Design Verification Engineer (GPU)

West Coast Consulting LLC

Texas, USA

Contract

Job Description Austin, TX or San Jose, CA Onsite Description: Position Requirements: Role and Responsibilities: Key responsibilities include Work with architects and designers to build verification environments and test plans Craft functional verification coverage strategy to ensure complete test suite implementation Develop assertions and checks to optimize isolation time and produce meaningful failing signatures Analyze failing tests to root cause along, working with RTL and reference modeli