Verification Engineer Jobs

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validation verification Engineer

Data Systems Integration Group

Manassas, Virginia, USA

Third Party, Contract

Job Title: Sr. Systems Engineer Duration: 12+ month Work Location: Manassas, Viginia (Onsite daily) NOTE:** Candidate will need to go to Santa Clara for 3-4 weeks in beginning of project to train with the team. Primary Responsibilities 1. Perform prototype bring-ups, tackle tough system and board level issues. 2. Run system tests. Collect and report on testing results. Screen modules and boards as part of testing and debug. 3. Create and develop test plans for new features on each product. Recom

UVM Digital Verification Engineer

Draper

Boston, Massachusetts, USA

Full-time

Job Description Summary: Draper's Digital Design Team is seeking a motivated and experienced UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal designs in the areas of embedded security, cryptography, signal and image processing, navigation and communications. Job Description: Duties/Responsibilities Design and simulate circuits at transistor-level to implem

Design Verification Engineer

Innova Solutions, Inc

Mountain View, California, USA

Contract

A client of Innova Solutions is immediately hiring for a Design Verification Engineer Position type: Contract Location: Mountain View, CA-Onsite As a Design Verification Engineer, you will be responsible for: Job description: Strong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirements.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC leve

Principal Verification Engineer

OSI Engineering, Inc.

Raleigh, North Carolina, USA

Full-time

A leading chip and silicon IP provider is looking to hire a talented Principal Verification Engineer to join its Memory Interconnect Design team in either San Jose, CA or Morrisville, NC. This is a great opportunity to work alongside some of the industry's top engineers to help develop cutting-edge technologies that accelerate and secure data. In this full-time role, the Principal Verification Engineer will report to the Director of Design Engineering and take a key role in product development

Software Verification Engineer

SAIC

Middletown, Rhode Island, USA

Full-time

Job ID: 2506962 Location: MIDDLETOWN, RI, US Date Posted: 2025-06-24 Category: Information Technology Subcategory: Embedded SW Engr Schedule: Full-time Shift: Day Job Travel: No Minimum Clearance Required: None Clearance Level Must Be Able to Obtain: Secret Potential for Remote Work: No Description SAIC is seeking Software Verification Engineers to support the US Navy in Middletown, RI. JOB DESCRIPTION: Performs software verification activities for a large test system containing deskt

Silicon Verification Engineer

Experis

Mountain View, California, USA

Full-time

Our client, a leader in the technology sector, is seeking a Silicon Verification Engineer 5 to join their team. As a Silicon Verification Engineer 5, you will be part of a dynamic team supporting the development of cutting-edge silicon chips. The ideal candidate will have strong analytical skills, a proactive approach to problem-solving, and the ability to work independently, which will align successfully in the organization. Silicon Verification Engineer Mountain View, CA & Remote options 18

Senior UVM Digital Verification Engineer

Draper

Boston, Massachusetts, USA

Full-time

Job Description Summary: Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal designs in the areas of embedded security, cryptography, signal and image processing, navigation and communications. Job Description: Duties/Responsibilities Performs analysis approaches for a particular probl

Principal Verification Engineer

OSI Engineering, Inc.

San Jose, California, USA

Full-time

A leading chip and silicon IP provider is looking to hire a talented Principal Verification Engineer to join its Memory Interconnect Design team in either San Jose, CA or Morrisville, NC. This is a great opportunity to work alongside some of the industry's top engineers to help develop cutting-edge technologies that accelerate and secure data. In this full-time role, the Principal Verification Engineer will report to the Director of Design Engineering and take a key role in product development

Design Verification Engineer RISC-V CPU Development

Xpeerant Incorporated

Portland, Oregon, USA

Full-time

Design Verification Engineer RISC-V CPU Development Are you passionate about cutting-edge CPU architecture and ready to take your verification skills to the next level? We re partnering with a global leader in RISC-V processor design to find talented Design Verification Engineers to join their high-impact VLSI team. You ll work alongside seasoned architects and engineers to verify next-generation RISC-V CPU cores, develop test benches from the ground up, and help shape the future of custom CPU I

MLA IP Design Verification Engineer , Annapurna Labs

Annapurna Labs (U.S.) Inc.

Cupertino, California, USA

Full-time

Job summary Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We are seeking an experienced Design Verification Engineers to build the next generation of our cloud server platforms. Our success depends on our world-class infrastructure; we're handling massive scale and rapid integration of emergent technologies. As a member of the Cloud-Scale Machine Learning

DFT/DFD Verification Engineer - Advanced SoC Projects

Yoh - A Day & Zimmerman Company

Remote or Santa Clara, California, USA

Full-time

DFT/DFD Verification Engineer Advanced SoC Projects We are looking for a seasoned Design-for-Test / Design-for-Debug Verification Engineer focused on validating sophisticated test and debug logic within next-generation SoCs. This position involves verifying scan architectures such as JTAG, iJTAG, and other internal debug features to support robust manufacturing testability and effective post-silicon debugging. The role will require tight collaboration with engineering teams across design, integ

Principal Design Verification Engineer

OSI Engineering, Inc.

San Jose, California, USA

Full-time

Principal Design Verification Engineer A leading chip and silicon IP provider focused on accelerating and securing data is looking to hire an outstanding Principal Design Verification Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This role offers the chance to work alongside top engineering talent on innovative products that push the boundaries of speed and data security. As a Principal Design Verification Engineer, you ll play a critical role in the development of MIC

MLA IP Design Verification Engineer , Annapurna Labs

Annapurna Labs (U.S.) Inc.

Cupertino, California, USA

Full-time

Job summary Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world.We are seeking an experienced Design Verification Engineers to build the next generation of our cloud server platforms. Our success depends on our world-class infrastructure; we're handling massive scale and rapid integration of emergent technologies.As a member of the Cloud-Scale Machine Learning Acc

GPU Verification Engineer (with ASCI Verification)

TechSynergy Sources

San Jose, California, USA

Full-time

Senior ASIC Verification Engineer to work on GPU Top Verification ASIC verification experience including development of verification strategy, test plans, tests, testbench components as well as regression triage, debug, and coverage closure Expertise in C, C++, and System Verilog Experience with industry standard design, verification, and debug tools Strong programming and scripting experience in C/C++, Perl, or Python that uses suitable algorithms, data structures, and error handling End to End

Defense Sr. FPGA Design Verification Engineer with Secret Clearance

ZoeTech Staffing LLC

Columbia, Maryland, USA

Full-time

Job Description: Our defense client is seeking digital verification engineers to support our development of secure tactical communication products. The candidate will function primarily in an FPGA verification role, working in a cooperative team environment to verify and test embedded FPGA firmware for radio communication systems. Successful candidates must have familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard int

CPU Verification ENgineer

TalentBridge

Menlo Park, California, USA

Contract

CPU/SOCS VERIFICATION ENGINEER Location: Menlo Park, CA 94025 ( 5 Days onsite ) Duration: 12 months + extension Job Summary: As a CPU Verification Engineer, you will be a key member of the design verification team at to deliver our high-quality next generation AI integrated, cloud-native server class SoCs. You will be responsible for defining verification strategies and architecting solutions for complex verification problems. You will partner with stakeholders in adjacent domains and enable

AMS Design Verification Engineer (Custom SC)

Texas Instruments

Dallas, Texas, USA

Full-time

Job Description Change the world. Love your job. This position offers a great opportunity to work on some of TI's most advanced custom products. As an AMS DV Engineer, you will have responsibility for driving design execution excellence across the company on projects for TI's largest customer. You'll work closely with design, systems, verification, characterization, test and product engineers to define, develop, and productize the best chip design for custom semiconductor devices. This role is

Senior SOC/ASIC Verification Engineer

GAC Solutions Inc.

Phoenix, Arizona, USA

Full-time, Part-time, Contract, Third Party

Role: Senior SOC/ASIC Verification Engineer Location: Arizona - Onsite Contract We're seeking an experienced Design Verification Engineer with 8 10 years of hands-on expertise in SystemVerilog/UVM, EDA tools (Synopsys/Cadence), and scripting (Python, TCL, Perl). Must have experience in functional verification, assertions, and emulation, with a strong track record in ASIC development. Background in verifying GPU/CPU, high-speed interfaces (PCIe, DDR), or data center applications is a plus.

Silicon Verification Engineer 2

Dexian DISYS

Remote

Contract

Role: Silicon Verification Engineer 2 Location: 100% remote Duration: Till 9/30/2025 (Possible Extension : Yes) Summary: The main function of Silicon Verification Engineer is to be a part of the test-plan generation process, creating, testing, and implementing various verification plans. Job Responsibilities: Define, document, and implement a UVM verification environment including agents and scoreboards Write test plans and implement them by developing tests, test generators, test benches, che

Verification and Validation Engineer

Booz Allen Hamilton

Clearfield, Utah, USA

Full-time

Job Number: R0221685 Verification and Validation Engineer The Opportunity: Are you looking for an opportunity to combine your technical skills with big picture thinking to make an impact in national security? You understand your customer's environment and how to develop the right systems for their mission. Your ability to translate real-world needs into technical specifications makes you an integral part of delivering a customer focused engineering solution. When a user tries new sof tware, they