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System Verilog UVM Design Verification Test Engineer

U.S. Tech Solutions Inc.

Remote

Contract

Job Description: The project relates to the design and verification of a custom controller for analog components. The controller has interfaces such as SPI, Ethernet and AXI to drive the internal components and send data. Responsibilities: UVM/python test development for driving VIPs and other stimulus driversGeneration of test components such as monitors, scoreboards and python modelsCoverage closure and GLS bringup and testing Experience: 6+ years of experience with verification methodologies

Senior FPGA Design Engineer

Triple Crown Consulting

El Segundo, California, USA

Contract

Triple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who engineer digital transformation and growth. CONTRACT Position: 12 Months Location: Onsite in Northridge, CA (Preferred) or El Segundo, CA s We are seeking a highly skilled FPGA Design Engineer to contribute to the design,

Product development Engineer

Innova Solutions, Inc

Santa Clara, California, USA

Full-time

A client of Innova Solutions is immediately hiring for a Product development Engineer. Position type: Fulltime Location: Santa Clara, CA-Onsite As an Product development Engineer, you will be responsible for: Job description: Gathering all test program requirements (structural coverage, Vmin/Vmax/Fmax routines to measure degradation etc.) and work with Test Teams to ensure all content is enabled.Product verification and failure analysis on Verigy 93K tester.ATE 93K, Testing experience required.

Senior FPGA Design Engineer

Perennial Resources International

Columbia, Maryland, USA

Full-time

FPGA Engineer Columbia, MD (Onsite) Full Time Opportunity Requirements Work collaboratively with a team of design engineers and embedded software engineers to develop software defined radiosAnalyze, design, and develop high-performance algorithms implemented in a FPGAImplement digital signal processing chains - digital down conversion, digital frequency synthesis, fast Fourier transforms, filters, etc.Implement high speed IO interfaces JESD204B, SERDES, PCIe, 10 GbE, DDRInterface with ADCs, SOC

Quantum Verification Engineer

Infinite Computer Solutions (ICS)

Rochester, Minnesota, USA

Contract

Job Title: Quantum Verification Engineer Duration: 12+ Months (Possibility of Extension) Location: Rochester, MN (Onsite) Role & Responsibilities Verification Ownership: Take charge of the verification triage for microprocessor components, contributing to the identification of functional and performance issues pre-silicon production. Implement best practices and innovative methodologies to ensure robust and efficient verification processes.Documentation and Communication: Thoroughly document ver

Embedded SWE - Signal Image Processing

Learn Beyond Consulting LLC

Lafayette, Colorado, USA

Full-time

Role: Embedded SWE - Signal Image Processing Location: Lafayette, CO Job Description: Design, develop, and optimize embedded vision software using Xilinx Kria SOM Develop and integrate with FPGA-based image processing pipelines (ISP) for tasks such as: Demosaicing, noise reduction, white balancing, gamma correction, and image enhancement. Interface with CMOS image sensors (via MIPI CSI-2 or parallel interfaces) and configure them using I2C/SPI. Implement real-time image streaming over USB, Ether

STA Engineer/SDC Engineer

Prismagic Solutions Inc

San Jose, California, USA

Contract

About the Role:Seeking an experienced STA/SDC engineer to own block and full-chip constraints, perform Static Timing Analysis (PrimeTime/Tempus), and collaborate with design and physical design teams for timing closure. Key Skills: Strong expertise in STA and SDC constraints (functional & test modes) Experience with PrimeTime, Tempus, and synthesis tools (Synopsys DC/DCG/FC) Verilog/SystemVerilog design knowledge CDC/glitch analysis (Spyglass CDC), Formal Verification (Formality, LEC) Scripting

Software Development Engineer (Graphics)

Seneca Resources, LLC

Santa Clara, California, USA

Contract

JD 3-5 years of experience with Graphics IP ASIC verification 3-5 years of experience and solid skills in Verilog, OVM/UVM, C/C++, Linux Keen understanding of System Level issues & requirements Demonstrated experience using vcs and verdi for functional verification and debugging a strong asset Strong interpersonal skills for interaction with large team on multiple sites Excellent verbal and written communication skills Have a strong emphasis on meeting program requirements regarding features and

Digital SoC Design Verification Principal Engineer/Manager

Island Staffing

San Jose, California, USA

Full-time

Digital SoC Design Verification Principal Engineer/Manager 140-225K (+ Pre-IPO Stock Options) San Jose, CA (hybrid 1 day/week remote, 4 days/week onsite) We are looking for an experienced Digital SoC Design Verification Principal Engineer/Manager to lead a team of engineers in developing innovative Open RAN SoC functional blocks for 5G cellular base stations. In this role, you will be responsible for driving the development of high-quality digital solutions and contributing to product definition

Senior Front-End ASIC Engineer

DivTek Global Solutions Inc.

San Jose, California, USA

Full-time

Job Title: Senior Front-End ASIC Engineer Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available Job Description Our client is seeking a Senior Front-End ASIC Engineer to join their elite engineering team. This is a unique op

Senior FPGA Engineer - R

Next Step Systems

Chicago, Illinois, USA

Full-time

Senior FPGA Engineer, Chicago, IL We are looking to hire a highly talented Senior FPGA Engineer to join the technology team. This position is 100% Onsite and NOT open for Remote. Senior FPGA Engineer Responsibilities: - Oversee full life cycle of FPGA development. - Working collaboratively with the technology and business teams to integrate FPGA and hardware solutions into our trading and research platforms. - Researching and working with industry leading hardware and FPGA products. - Working a

CPU Power Analysis Lead

Vaco by Highspring

San Diego, California, USA

Full-time

SummaryLead power and thermal analysis for CPU subsystems, collaborating across design, SoC, and board teams to optimize power delivery, performance, and efficiency. This role focuses on driving power projections, analysis, and optimization from RTL to silicon. Key Responsibilities Lead power and thermal analysis using tools like Joules and PTPX. Define CPU rail planning and PMIC sizing; optimize PDN with SoC/board teams. Develop power vector plans and correlate projections with silicon data. Co

FPGA Programmable Logic Engineer (Networking Protocol)

Arkham Technology

Irvine, California, USA

Full-time

FPGA Programmable Logic Engineer Must be eligible to obtain and maintain a DoD Secret clearance. Active clearance preferred. Are you tired of office politics and bureaucracy? Arkham Technology is a small innovative company that is all about getting work done without the drama and politics. How do we do it? We offer a great office environment, small and friendly setting We focus on fun, like great projects, free snacks and group activities all while being productive. If you love working on fun pr

GPU Formal Verification Engineer (Multiple Levels Available)

Qualcomm Technologies

San Diego, California, USA

Full-time

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm GPU Engineer, you may architect, design, implement, verify, and/or optimize the performance and power of GPU cores. Qualcomm Engineers collaborate wi

Sr Principal DFT Application Engineer

Cadence Design Systems Inc

Cary, North Carolina, USA

Full-time

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in scan chain insertion, compression scan technologies, memory built-in self-test (MBIST) and automatic test pattern generation (ATPG) is required for this position. Should follow systematic quality metrics driven ATPG pattern generation. It is highly desira

DFX RTL Design Engineer - Specialized (US)

Sunrise Systems, Inc.

Santa Clara, California, USA

Contract

DFX RTL Design Engineer - Specialized (US) Santa Clara, CA - 95054 6 Months candidate must be able to come onsite to San Jose, CA 3 days per week OB DUTIES: This is a position for senior level RTL design engineer. As a part of the design team, candidate will be exposed to several IPs including Gbit SERDES, UCIe, PCIe I/F & high frequency design. Successful candidates will be participating in the DFX RTL coding/integration of leading edge I/O SoC in 3 nm processes. This DFX RTL Design Engineer

SoC Power Analysis and Optimization Engineer

Apple, Inc.

No location provided

Full-time

As part of our Silicon Engineering group, you will take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you will help design products that bring to our customers experiences they've never before envisioned. In this highly visible role, you will be responsible for SOC power optimization automation, power modeling,

Senior Analog RFIC Design Engineer

Everest Consultants, Inc

Hillsboro, Oregon, USA

Full-time

Title: Senior Analog RFIC Design Engineer Duration: Permanent, Full-time Location: Hillsboro, OR (Hybrid: onsite 3 days per week) Salary Range: $140,000 to $200,000 per year **Candidates must have valid U.S. work authorization at the time of hire. Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals who have a vision for the future, a desire to impact the world, and a drive to turn innovative ideas into reality. They are hirin

FPGA Development Engineer

Judge Group, Inc.

Pennsylvania, USA

Full-time

Location: East Bradford, PA Salary: $120,000.00 USD Annually - $140,000.00 USD Annually Description: Our client is currently seeking a FPGA Development Engineer. This is a permanent, direct hire, hybrid position. Responsibilities: Develop Verilog/System Verilog codeCollaborate on transceiver selection and FPGA pinoutValidate features through lab testing and simulationDocument designs and provide technical supportWork with PCB designers, software engineers, and FPGA/ASIC developers Requireme

Design Verification Engineer

LeadStack, Inc.

No location provided

Full-time, Contract

Lead Stack Inc. is an award-winning, one of the nation's fastest-growing, certified minority-owned (MBE) staffing services provider of contingent workforce. As a recognized industry leader in contingent workforce solutions and Certified as a Great Place to Work, we're proud to partner with some of the most admired Fortune 500 brands in the world. TITLE: Design Verification Engineer LOCATION: San Jose CA/ Austin TX DURATION: 5+ Months with possible extension Rate: $90-$110/hr on W2 Job Descriptio