Verilog jobs | Dice.com

Sunset Valley, Texas

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6d ago

Job Description: Hands-on experience with VC Formal (Synopsys) and/or Jasper Gold (Cadence) Strong proficiency in System Verilog Assertions (SVA) and formal property specification Experience with formal verification applications: FPV, connectivity checking, register verification, equivalence checking, and coverage analysis Familiarity with scripting languages (TCL, Python, Perl) for flow automation Extensive experience in design verification with a strong focus on formal verification Expertise i

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Contract, Third Party

Depends on Experience

Formal Verification

Ben Lomond, California

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6d ago

JOB DUTIES: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system. Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run du

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Contract, Third Party

Depends on Experience

RTL Verification Engineer # 26-23383

Markham, Ontario

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3d ago

Duration: 8 months Description: As a Verification Engineer 5, you will play a key role in defining, developing, and executing advanced verification solutions for complex Display IP and SoC designs. You will work closely with architects, design engineers, software teams, and program managers to ensure first-pass silicon success and deliver high-quality products to market. The ideal candidate is passionate about verification methodologies, possesses strong expertise in System Verilog/UVM-based ver

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Contract

$80 - $100

RTL Verification Engineer # 26-21738

Ben Lomond, California

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3d ago

Duration: 12+ Months About the role:Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort.Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system.Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-ra

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Contract

$80 - $85

DFT Engineer

California

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Today

Job Title: DFT Engineer Location: Saratoga, CA (Onsite) Duration: Contract & Full-Time Job Description: Define the DFT architecture of a multi-chip system SOC. involving all aspects of test design functions such as Scan, BIST, Memory Repair, BSD ( ACJTAG/DCJTAG). Proficiency in Synthesis design constraints. ( Ie SDC) Prior experience with Serializers/Deserilizers. Sound Proficiency in either Mentor /Synopsys Test Tools required. Proficiency is synthesis, Define and implement OCC. Exposure to

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Full-time

ASIC Engineering Technical Leader

San Jose, California

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Today

Role: ASIC Engineering Technical Leader Location: San Jose, CA (Onsite) Start Date: Immediate Type: Contract (C2C/W2) Interview: Phone/Video We are seeking an ASIC Engineering Technical Leader with strong expertise in DesignforTest (DFT) for nextgen optical communication ASICs. Responsibilities include DFT architecture implementation, scan insertion, ATPG pattern generation, silicon debug, integration/verification of DFT fabrics, gatelevel simulations, and automation using Python/Tcl/C++.

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Full-time, Part-time, Third Party, Contract

Sr. ASIC/FPGA Design Engineer

Remote

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7d ago

Job Title: Sr. ASIC/FPGA Design Engineer Work Location: Fully remote Duration: 8 months Terms: W2 Contract Key Skills: FPGA and Application-Specific Integrated Circuit (ASIC), Verilog, VHDL, SystemVerilog Responsibilities: Design and develop digital ASICs and FPGAs, and/or mixed-signal ASICs Implement designs using HDL (VHDL, Verilog, and/or SystemVerilog).Develop verification methodologies and test benches for block and system-level verification.Create and execute test plans, develop test har

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Contract

110 - 117

DFT MBIST Staff Engineer

Remote

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5d ago

Position Summary: We are looking for a highly experienced Senior MBIST Contractor to join our SoC Design-for-Test (DFT) team. The role is focused on hands-on Memory BIST implementation using Synopsys MBIST (SMS). The ideal candidate is an independent contributor who can own the complete MBIST flow from insertion through verification, simulation, pattern generation, and Silicon bring-up with minimal supervision. Responsibilities: Perform MBIST insertion for complex SoC designs using Synopsys SMS

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Third Party, Contract

90 - 100

DFT (Design for Test) Engineer_SanJose, CA (Onsite)

San Jose, California

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Today

Design for Test (DFT) Engineer Location: San Jose, CA Duration: 12 + Months (Potential Extension) Interview Process: Virtual/Onsite Rate: Up to $130/hr on W2 (No Benefits) Job OverviewWe are seeking an experienced Design for Test (DFT) Engineer to support the development and validation of next-generation semiconductor products. The role involves close collaboration with Front-End Design and Physical Design teams to implement and optimize DFT solutions for advanced wireless and connectivity c

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Contract

100 - 130

CPU Verification ML Tool Engineer

Santa Clara, California

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Today

In this highly visible role, you will be at the center of a chip design effort interfacing with many disciplines, with a critical impact on getting high quality products to millions of customers quickly. Description As a CPU verification ML tool engineer owning the ML based verification tools, and flow of a high performance lower power processor design, you will have the responsibilities as follows: Work closely with verification engineers and RTL designers on defining effective ML based veri

Full-time

DFT Engineer Intern

No location provided

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Today

AI Vision Processors For Edge Applications Our solutions make cameras smarter by extracting valuable data from high-resolution video streams. Job Description Position Responsibilities: Logic Design to support DFT featuresAutomate DFT Flows (Scan, Compression & MBIST) used for complex multi-million gate SoCVerification of DFT Logic and analysis of fault coverageTiming analysis for DFT Modes Minimum Requirements: MSEE in Electrical / Computer EngineeringKnowledge of DFT fundamentalsKnowledge of

Full-time

Mixed Signal Verification Engineer

San Jose, California

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Today

Job Description ONSITE in San Jose, CA JOB RESPONSIBILITIES Creating AMS/DMS testbench for wireless RF and High Speed PHY. Working with RF/Analog design engineers for analog circuit models Support silicon bring-up and commercialization. REQUIRED SKILLS BS or BE minimum, 3+ year experiences Deep understanding of digital VLSI simulation flow Deep understanding of mixed-mode and analog simulation flow Experience with Verilog/SystemVerilog and RNM modeling Experience with digital verification, U

Contract

Analog Mixed Signal Firmware Engineer

Cupertino, California

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Today

Imagine what you could do here at Apple? Together we could help craft the next generation of the world's finest devices. New ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your career, and there's no telling what you could accomplish. The team is searching for a self-motivating, passionate electrical engineer for the role of AMS Firmware Engineer. As a team, we will be working on the leading-edge technology no

Full-time

FE Engineer

Sunnyvale, California

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Today

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practice

Full-time

FPGA Intern Engineer

Manassas, Virginia

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Today

Basic Qualifications Candidates should demonstrate a thorough understanding of engineering technology. Engineering Interns must be enrolled in an accredited degree program in Computer Engineering, Systems Engineering, Software Engineering, Electrical Engineering, Mechanical Engineering or other related scientific or technical discipline with a preference for a standing of a sophomore or higher. Due to the nature of work performed within our facilities, U.S. citizenship is required. Responsibil

Full-time

USD 24.70 - 30.45 per hour

SoC Integration Engineer

Remote

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Today

This is Ganesh from DELLA INFOTECH INC. We have an outstanding opening for you for the opportunity below. Please check the job description and share your updated resume, if you are interested. Job Title : SoC / RTL Integration Engineer Location : Remote Good in understanding RTL Design and Digital concepts Subsystem or SoC integration Integration 1P and 3P IP's, generating 3P fabrics, quality checks and PD handoff etc. SS integration using Verilog/system Verilog, synthesis, timing constraints,

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Contract

70 - 75

Mixed Signal Engineer Intern

No location provided

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Today

AI Vision Processors For Edge Applications Our solutions make cameras smarter by extracting valuable data from high-resolution video streams. Job Description Job description: As a member of the Mixed Signal team, the candidate will work with senior circuit designers in the design, validation and characterization of mixed signal and analog IP blocks for SOC. The IPs include PLL, DLL, SERDES, high speed IO and data converters, etc. for sub-14nm technologies. The candidate will have exposure to

Full-time

ASIC/SoC Verification Architect – Short Supplier

St. Louis, Missouri

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21d ago

Key Requirements: 10+ years of experience in ASIC/SoC verification and verification architecture. Strong hands-on SystemVerilog, UVM, Verilog, and constrained-random verification. Experience developing verification strategies, test plans, testbenches, coverage models, and verification environments. Strong knowledge of SoC architecture, RTL, CPU/processor, interconnects, memory, and IP verification. Experience with UVM/SystemVerilog assertions, functional/code coverage, simulation, and debugging.

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Contract

Up to 160

Electronic Design Engineer

Fort Worth, Texas

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Today

Job Summary: - Assist with the development, design, testing and certification documentation for new or modified printed circuit board modules for aircraft - Apply electrical engineering theory and the operation of electronic test equipment to test and troubleshoot avionics / electrical modules or systems - Model and simulate electronic circuits using SPICE software - Design printed circuit board layouts using Altium design software - Modify and maintain programmable logic designs in FPGAs an

Full-time

Memory System Designer and Place and Route Engineer

Mendota Heights, Minnesota

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: We are looking for an energetic and passionate design engineer to join our Central Engineering Group and be part of a memory subsystem design team responsible for the development of large memory blocks and subsystems. Typically requires a minimum of 8

Full-time

USD 109,700.00 - 175,500.00 per year