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Sr. DFT Verification Engineer, Dojo

Tesla Motors

Fort Collins, Colorado, USA

Full-time

Tesla's Silicon Development Group is looking for a Design-for-Test (DFT) Design Verification Engineer to work on custom ASICs. You will drive state of the art in the area of testability and contribute to product coverage and quality by verifying the DFT features pre-silicon and by delivering test content for post-silicon. Responsibilities Create Verilog/System Verilog/UVM test benches to verify various DFT features in RTL such as SSN, compressed and uncompressed scan, memory BIST, JTAG, and bou

Senior Front-End ASIC Engineer

DivTek Global Solutions Inc.

San Jose, California, USA

Full-time

Job Title: Senior Front-End ASIC Engineer Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available Job Description Our client is seeking a Senior Front-End ASIC Engineer to join their elite engineering team. This is a unique op

Sr. DFT Verification Engineer, Dojo

Tesla Motors

Austin, Texas, USA

Full-time

Tesla's Silicon Development Group is looking for a Design-for-Test (DFT) Design Verification Engineer to work on custom ASICs. You will drive state of the art in the area of testability and contribute to product coverage and quality by verifying the DFT features pre-silicon and by delivering test content for post-silicon. Responsibilities Create Verilog/System Verilog/UVM test benches to verify various DFT features in RTL such as SSN, compressed and uncompressed scan, memory BIST, JTAG, and bou

Senior FPGA Engineer - R

Next Step Systems

Chicago, Illinois, USA

Full-time

Senior FPGA Engineer, Chicago, IL We are looking to hire a highly talented Senior FPGA Engineer to join the technology team. This position is 100% Onsite and NOT open for Remote. Senior FPGA Engineer Responsibilities: - Oversee full life cycle of FPGA development. - Working collaboratively with the technology and business teams to integrate FPGA and hardware solutions into our trading and research platforms. - Researching and working with industry leading hardware and FPGA products. - Working a

Senior FPGA Design Engineer

Triple Crown Consulting

El Segundo, California, USA

Contract

Triple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who engineer digital transformation and growth. CONTRACT Position: 12 Months Location: Onsite in Northridge, CA (Preferred) or El Segundo, CA s We are seeking a highly skilled FPGA Design Engineer to contribute to the design,

Advanced Electrical Engineer, Circuit Design

Computer Merchant, Ltd., The

Manassas, Virginia, USA

Full-time

JOB TITLE: Advanced Electrical Engineer, Circuit Design JOB LOCATION: Manassas, VA WAGE RANGE*: 60-70 JOB NUMBER: 25-03053 JOB DESCRIPTION: Our client, a large defense contractor, has an immediate opening for an Advanced Electrical Engineer, Circuit Design to work from their Manassas, VA facility. Seeking a Mid-Level Electrical Engineer with 5+ years of technical experience to become an integral member of the engineering team dedicated to the development of military-grade electronics the Com

Product development Engineer

Innova Solutions, Inc

Santa Clara, California, USA

Full-time

A client of Innova Solutions is immediately hiring for a Product development Engineer. Position type: Fulltime Location: Santa Clara, CA-Onsite As an Product development Engineer, you will be responsible for: Job description: Gathering all test program requirements (structural coverage, Vmin/Vmax/Fmax routines to measure degradation etc.) and work with Test Teams to ensure all content is enabled.Product verification and failure analysis on Verigy 93K tester.ATE 93K, Testing experience required.

Quantum Verification Engineer

Infinite Computer Solutions (ICS)

Rochester, Minnesota, USA

Contract

Job Title: Quantum Verification Engineer Duration: 12+ Months (Possibility of Extension) Location: Rochester, MN (Onsite) Role & Responsibilities Verification Ownership: Take charge of the verification triage for microprocessor components, contributing to the identification of functional and performance issues pre-silicon production. Implement best practices and innovative methodologies to ensure robust and efficient verification processes.Documentation and Communication: Thoroughly document ver

Senior FPGA Design Engineer

Perennial Resources International

Columbia, Maryland, USA

Full-time

FPGA Engineer Columbia, MD (Onsite) Full Time Opportunity Requirements Work collaboratively with a team of design engineers and embedded software engineers to develop software defined radiosAnalyze, design, and develop high-performance algorithms implemented in a FPGAImplement digital signal processing chains - digital down conversion, digital frequency synthesis, fast Fourier transforms, filters, etc.Implement high speed IO interfaces JESD204B, SERDES, PCIe, 10 GbE, DDRInterface with ADCs, SOC

FPGA Development Engineer

Judge Group, Inc.

Pennsylvania, USA

Full-time

Location: East Bradford, PA Salary: $120,000.00 USD Annually - $140,000.00 USD Annually Description: Our client is currently seeking a FPGA Development Engineer. This is a permanent, direct hire, hybrid position. Responsibilities: Develop Verilog/System Verilog codeCollaborate on transceiver selection and FPGA pinoutValidate features through lab testing and simulationDocument designs and provide technical supportWork with PCB designers, software engineers, and FPGA/ASIC developers Requireme

Digital SoC Design Verification Principal Engineer/Manager

Island Staffing

San Jose, California, USA

Full-time

Digital SoC Design Verification Principal Engineer/Manager 140-225K (+ Pre-IPO Stock Options) San Jose, CA (hybrid 1 day/week remote, 4 days/week onsite) We are looking for an experienced Digital SoC Design Verification Principal Engineer/Manager to lead a team of engineers in developing innovative Open RAN SoC functional blocks for 5G cellular base stations. In this role, you will be responsible for driving the development of high-quality digital solutions and contributing to product definition

STA Engineer/SDC Engineer

Prismagic Solutions Inc

San Jose, California, USA

Contract

About the Role:Seeking an experienced STA/SDC engineer to own block and full-chip constraints, perform Static Timing Analysis (PrimeTime/Tempus), and collaborate with design and physical design teams for timing closure. Key Skills: Strong expertise in STA and SDC constraints (functional & test modes) Experience with PrimeTime, Tempus, and synthesis tools (Synopsys DC/DCG/FC) Verilog/SystemVerilog design knowledge CDC/glitch analysis (Spyglass CDC), Formal Verification (Formality, LEC) Scripting

DFX RTL Design Engineer - Specialized (US)

Sunrise Systems, Inc.

Santa Clara, California, USA

Contract

DFX RTL Design Engineer - Specialized (US) Santa Clara, CA - 95054 6 Months candidate must be able to come onsite to San Jose, CA 3 days per week OB DUTIES: This is a position for senior level RTL design engineer. As a part of the design team, candidate will be exposed to several IPs including Gbit SERDES, UCIe, PCIe I/F & high frequency design. Successful candidates will be participating in the DFX RTL coding/integration of leading edge I/O SoC in 3 nm processes. This DFX RTL Design Engineer

Software Development Engineer (Graphics) - Intermediate - Onsite

VIVA USA INC

Folsom, California, USA

Contract

Title: Software Development Engineer (Graphics) - Intermediate - Onsite Mandatory skills: Graphics, Graphics IP ASIC verification, Verilog, OVM, UVM, C, C++, Linux, VCS, Verdi, CPU, GPU, React, MongoDB, SQL, Python, Git, GitHub, Github Copilot, Jira, HLP, driver, firmware, GFXR, Debugging, SOC, Chip, engine development, program requirements, functional verification, test plan, random stimulus, assertions, custom logic checkers, reference models, measured coverage Description: JOB DUTIES: Work

Software Development Engineer (Graphics)

Seneca Resources, LLC

Santa Clara, California, USA

Contract

JD 3-5 years of experience with Graphics IP ASIC verification 3-5 years of experience and solid skills in Verilog, OVM/UVM, C/C++, Linux Keen understanding of System Level issues & requirements Demonstrated experience using vcs and verdi for functional verification and debugging a strong asset Strong interpersonal skills for interaction with large team on multiple sites Excellent verbal and written communication skills Have a strong emphasis on meeting program requirements regarding features and

Senior Analog RFIC Design Engineer

Everest Consultants, Inc

Hillsboro, Oregon, USA

Full-time

Title: Senior Analog RFIC Design Engineer Duration: Permanent, Full-time Location: Hillsboro, OR (Hybrid: onsite 3 days per week) Salary Range: $140,000 to $200,000 per year **Candidates must have valid U.S. work authorization at the time of hire. Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals who have a vision for the future, a desire to impact the world, and a drive to turn innovative ideas into reality. They are hirin

Lead RFIC ASIC Design Engineer

Everest Consultants, Inc

Hillsboro, Oregon, USA

Full-time

Title: Lead RFIC ASIC Design Engineer Duration: Permanent, Full-time Location: Hillsboro, OR (Hybrid: onsite 3 days per week) Salary Range: $160,000 to $225,000 per year **Candidates must have valid U.S. work authorization at the time of hire. Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals with a vision for the future, a desire to impact the world, and a drive to bring innovative ideas to life. They are building develop

CPU Power Analysis Lead

Vaco by Highspring

San Diego, California, USA

Full-time

SummaryLead power and thermal analysis for CPU subsystems, collaborating across design, SoC, and board teams to optimize power delivery, performance, and efficiency. This role focuses on driving power projections, analysis, and optimization from RTL to silicon. Key Responsibilities Lead power and thermal analysis using tools like Joules and PTPX. Define CPU rail planning and PMIC sizing; optimize PDN with SoC/board teams. Develop power vector plans and correlate projections with silicon data. Co

Verification Engineer

AdientOne LLC

Massachusetts, USA

Contract

Role: Verification Engineer Location: Boxborough MA 01719 | Hybrid Duration: 12+ months Note: Prefer experience with PSS language and UVM Job Description: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and ove

Design Verification Engineer

AdientOne LLC

Massachusetts, USA

Contract

Role: Design Verification Engineer Location: Boxborough MA 01719 | Hybrid Duration: 7 months Job Description: Collaborate with team to verify complex IP blocks. Develop and execute tests. Debug issues related to functionality, performance, and power. Work on functional and/or code coverage closure. Requirements: Proven experience working in UVM and constrained-random simulation environments. Strong knowledge of System Verilog, Verilog, C/C++, and scripting languages. Familiarity with 3D pipelin