Ddr sdram jobs in newark, ca

DDR PHY Signal Integrity and Power Integrity Engineer

Santa Clara, California

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3d ago

We are looking for DDR PHY Signal Integrity and Power Integrity Engineer for our client in Santa Clara,CA Job Title: DDR PHY Signal Integrity and Power Integrity Engineer Job Location: Santa Clara,CA Job Type: Contract Job Overview: Pay Range: $71.42hr - $85.71hr Requirement/Must Have: Signal integrity (SI) and power integrity (PI) knowledge, including S-parameter/Z-parameter analysis, channel modeling, and PDN modeling.Knowledge of Ansys or Cadence simulation tools (e.g., HFSS, SIwave, Sigrity,

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Third Party, Contract

Depends on Experience

Verification Lead – Memory Controller (CHI-G / DFI)

San Jose, California

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Today

Role : Verification Lead Memory Controller (CHI-G / DFI) Location : San Jose, CA (Onsite) | Lead Level | Exp : 10+ Years We are looking for a Verification Lead with strong hands-on experience in Memory Controller Design Verification. Key Skills: 10+ years Design Verification experience 3+ years in Verification Lead/Management DDR4/DDR5/LPDDR Memory Controller verification ARM CHI / CHI-G protocol verification DFI interface & PHY verification Expert SystemVerilog / UVM AXI4 / ACE / AHB /

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Contract

Depends on Experience

Lead MTS Applications Engineering

San Jose, California

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Today

Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead MTS Application Engineer to join our Memory Interface team in San Jose California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As a Lead MTS Application engineer, the candidate will be reporting to Director of Application and Validation and is a Full-Time position. The engineer will work on developing the v

Full-time

USD 117,300.00 - 167,500.00 per year

Test Engineer-Various Levels

San Jose, California

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Today

Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire exceptional Test Engineers to join our Operations team in San Jose. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per wee

Full-time

USD 126,000.00 - 234,000.00 per year

Senior DFT Engineer

Santa Clara, California

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Today

Come be a part of new process technology adoption by joining NVIDIA's Advanced Technology Group! Work as part of the advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior DFT Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today. We encourage applicants with a history of proven success working in a multic

Full-time

USD 196,000.00 - 310,500.00 per year

ASIC Implementation Engineer PD

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom is searching for an ASIC top level floorplan Physical Design Engineer to join the Asic Products Division. This position involves working with the latest technology to continue driving next generation Artificial Intelligence and PCIe Switch Pro

Full-time

USD 121,900.00 - 195,000.00 per year

Senior SI/PI Engineer - AI and Compute Server Design

Fremont, California

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Today

@HYVE Solutions, missions to help customers, business partners, and employees achieve success through shared goals, strategies, resources and technology solutions. At Hyve Solutions, signal and power integrity are among the most critical disciplines in delivering reliable, high-bandwidth AI and compute servers. As next-generation platforms push PCIe Gen5/Gen6, CXL, NVLink, DDR5/DDR6, and 224G SerDes to their limits, disciplined SI/PI engineering is essential to first-pass success. This role foc

Full-time

USD 127,000.00 - 170,000.00 per year

Senior / Principal Layout Engineer - Module Architecture (Pathfinding)

San Jose, California

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Senior / Principal Layout Engineer to drive pathfinding and architecture exploration for next-generation memory modules and form factors (DDR6, LPDDR6/LPDDR7, MRDIMM Gen3/Gen4, SOC

Full-time

USD 202,000.00 - 344,000.00 per year

PE Product Engineering

San Jose, California

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Today

Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Product Engineering to join our Operations Engineering team in San Jose. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. As a Product Engineer, you will play a key role in new product introduction. In this full-time position, you will report directly to the Senior Manager of

Full-time

USD 124,000.00 - 230,400.00 per year

Electrical Engineer - Platform Architecture Systems Prototyping

Cupertino, California

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Today

Apple's Platform Architecture Engineering team builds fully functional prototypes of systems that cut across domains and technologies. We're a small, self-contained group of electrical, mechanical, FPGA, and software engineers who take an idea and make it real. Those range from tools that teams across the company come to depend on, to proofs-of-concept for products and capabilities that inform Apple's roadmap. We're looking for an electrical engineer to own board designs end to end. You'll work

Full-time

Senior Engineer, SoC Architecture - Memory Subsystem and Interconnect

Mountain View, California

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Today

Lab Summary: The Samsung Research America SOC Architecture Lab provides innovative SoC architecture, bus / memory subsystem, multimedia subsystems and key IP blocks for future Samsung Galaxy products (Smartphones, tablets and future devices). We are defining the high-performance SoC architecture development for various Galaxy device lineups. This lab collaborates with Samsung's strategic SoC partners, Samsung MX headquarter team, and key R&D teams around the globe to innovate and reinvent techno

Full-time

USD 158,800.00 - 218,100.00 per year

Senior Staff Engineer, SoC Architecture - Memory Subsystem and Interconnect

Mountain View, California

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Today

Full-time

USD 197,800.00 - 296,600.00 per year

Staff Engineer, SoC Architecture - Memory Subsystem and Interconnect

Mountain View, California

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Today

Full-time

USD 179,200.00 - 246,150.00 per year

Principal DDR5 / LPDDR5 PHY Validation Engineer

Santa Clara, California

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Today

Description Invent the future with us. Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications. Join us at Ampere and work alongside a passionate and growing team - we'd

Full-time

USD 195,000.00 - 292,000.00 per year

Application Engineer, Sr. Staff-18390

Sunnyvale, California

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Today

Descriptions & Requirements Job Description and Requirements We Are: At Synopsys, we drive the innovations that shape how we live and connect. Our technology powers the era of pervasive intelligence, from self-driving cars to learning machines. Join us to help shape the future through continuous innovation in chip design and IP integration. You Are: You are an experienced Application Engineer who is energized by solving complex customer challenges in Memory Interface and Interface IP. You brin

Full-time

Staff Hardware Design Engineer

Milpitas, California

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Today

Join the Team That's Redefining Wireless Technology At Tarana, we're more than just a fast-growing tech company-we're a team of bold innovators on a mission to revolutionize broadband. Our groundbreaking Fixed Wireless Access technology is delivering fiber-class internet speeds worldwide, bridging the digital divide in ways previously thought impossible. Tarana is a fast revenue growth company built by outstanding talented people and with innovative technology. Our hardware development team is

Full-time

USD 155,000.00 - 200,000.00 per year

Digital Hardware Engineer

Sunnyvale, California

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Today

Do you have a passion for taking on big challenges? Do you love pushing the limits of what's considered feasible? As part of our Wireless Hardware group, you'll be responsible for bringing groundbreaking wireless connectivity to the world. On this team, we help improve the performance of our products through innovative system-on-chip designs. Our team will build platform architecture that paves the way for all-new experiences, including the ones that allow people to take advantage of our innovat

Full-time

Principal (STA/ Sign-Off) Engineer-17042 (Austin/ Sunnyvale)

Sunnyvale, California

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Today

Descriptions & Requirements Job Description and Requirements The Hiring Manager is open to hiring in "Austin" and "Sunnyvale" both for this position. As a member of the IP Digital Design Methodology team, you will work with global teams to define best in class ASIC design standards and flows and assist IP development teams. You will be involved with next generation SerDes and Memory interface controllers, PHYs, and subsystems. We Are: At Synopsys, we drive the innovations that shape the way we

Full-time

PCB Layout Engineer

San Francisco, California

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11d ago

PCB Layout Engineer (High-Speed Server Board Design)Location: Bay Area, CA (Onsite) Duration: 6+ Months (Contract) Job SummaryWe are seeking an experienced PCB Layout Engineer with strong expertise in high-speed PCB layout and server board design. The ideal candidate will have hands-on experience designing complex multilayer server boards and be highly proficient in Cadence Allegro PCB Designer version 22.1 or higher. This role requires close collaboration with hardware, signal integrity, power

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Contract

55 - 58

Data Center Hardware Engineering - Hardware System Integration Engineer

Sunnyvale, California

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Today

At Apple, we push the boundaries of what's possible - and nowhere is that more evident than in the infrastructure that powers our most ambitious technologies. The Data Center Hardware Engineering Team designs and delivers the high-performance compute solutions that underpin Apple's services and products at scale. From custom silicon to full-system integration, our work ensures that Apple's global infrastructure is fast, efficient, and built to last. Every system we ship reflects our relentless c

Full-time

Ddr sdram jobs in Newark, CA 94560, USA