Logic synthesis jobs in Baltimore, MD, USA

The client is seeking a Senior ASIC RTL Design Engineer to own the microarchitecture and RTL design of complex, high-speed processor blocks. This role involves building IP from the ground up and taking blocks from initial specification through integration and working silicon.ResponsibilitiesDefine microarchitecture and develop synthesizable Verilog/SystemVerilog RTL for complex processor blocks.Own ground-up IP and block design from specification through RTL implementation, integration, and sili