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Job Title:Senior Principal Physical Design Engineer (Top-Level Floorplanning & STA) Location: San Jose / Austin Job Type: Onsite Experience : Relevant minimum 7+ years required and senior also fine. Responsibilities Own the full-chip top-level floorplan: die/partition planning, macro and memory placement, and pin/port alignment across block boundaries Define partition abutment, repeating structures, and channel/feedthrough strategy to enable clean block integration Drive top-level PPA optim
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