Design and Verification Engineer || San Jose, CA/Austin TX (Onsite)

Client: Etched Design Verification Engineer 6 Openings Location: San Jose, CA & Austin, TX - onsite Please find the JD: Job Summary We are seeking a Design Verification Engineer to join our Interface IP DV team. You will work with architects, designers, and vendors to ensure that all our architecture requirements are met in the IP subsystems and interfaces being created, validate correctness and performance across the full hardware-software stack. This role demands creativity, deep technical ab

About the role: The DVE is responsible for developing and verifying silicon IP. The DVE should have hands-on experience taking leading-edge digital silicon IP from idea to bring-up, working with Architecture/Micro-architecture, PD, and Software teams. This is an on-site role and will require presence in the office 5 days a week. No hybrid option is available. What you'll do: Develop, optimize, and verify digital silicon IP using an existing C or Python modelCreate and maintain specifications, b

Role: Verification Engineer Location: Santa Clara, CA & Contract Job Description: Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system. Be responsible for carefully documenting and executing test p

We have opening for Design Verification Engineer, Principal Location - Santa Clara, CA Full time permanent position Sponsorship available Must-haves BS Computer Engineering, Electrical Engineering, or Computer Science 10+ years of verification and firmware and software development experience (or MS/PhD 5+ years experience). Proven track records of leading Design Verification implementation activity Tape-out of complex SOC under tight schedule. In depth understanding and experience with System V