Posting/External Job Title
FPGA Engineer (Senior-Level)
Location
Houston, TX 77058 US (Primary)
Remote/Onsite/Hybrid
100% Onsite
Job Type
Full-time
# of Hires Needed
3
Education
Bachelor's Degree
Travel
None
Security Clearance Required
None
Pay Range (All offers will be based on experience)
$170,000.00 - $264,000.00/yr
Position Introduction/Key Duties
Cimarron is seeking senior-level
FPGA Engineers to support the design, development, testing, and optimization of FPGA-based systems for the Axiom xEVAS spacesuit project in Houston, TX.
Key Duties: - Design and implement FPGA modules and subsystems using VHDL.
- Perform third-party IP core integration and verification.
- Develop configurable, self-checking test benches implemented in VHDL/OSVVM.
- Integrate FPGA design with embedded software, flight software, and peripheral hardware components.
- Optimize FPGA designs for performance, power consumption, and resource utilization.
- Utilize FPGA toolchains such as Xilinx Vivado for synthesis, place-and-route, and timing closure.
- Document design specifications, generate reports, and contribute to peer review sessions.
- Assist in lab testing, system integration, and problem resolution throughout design cycles.
Required/Desired Skills, Experience, and Education
Required Skills, Experience, and Education: - Ability to complete a pre-employment background check and drug screening, which will include but is not limited to testing for marijuana use.
- 10 or more years of hands-on FPGA development experience.
- Experience successfully integrating FPGA designs into system-wide hardware/software environments.
- Basic knowledge of embedded C/C++, SoC integration, and bus protocols (UART, SPI, I2C, I2S).
- Ability to deliver high-quality VHDL modules and verification environments.
- Willingness to work evenings and weekends as needed to meet critical project milestones.
- Bachelor of Science (or higher) in Electrical Engineering.
Desired Skills, Experience, and Education: - Experience in ASIC design, DSP, or communication systems.
- Prior exposure to high-speed interface design for RF systems.
- Knowledge of Verilog.
- Experience with simulation and verification tools such as ModelSim, ISE Simulator, or equivalent.
- Prior experience with verification frameworks (UVM, OSVVM, OVM, etc.)
- Expertise in synchronous and asynchronous digital design, pipelines, finite-state machines, and FPGA architecture.
- Experience working with memory-mapped and stream interfaces (AXI-4, Avalon, AXI-Stream).
- Experience with the development of high-speed interfaces using Gigabit Transceivers (ex., PCIe, Ethernet, DisplayPort).
- Proficiency with hardware debugging tools, including logic analyzers, oscilloscopes, and timing analysis.
- Understanding of FPGA constraints, timing closure, and synthesis directives.
Business Profile: Cimarron is a global solutions company with a strategic partnering approach to satisfying customer-driven requirements. We ensure customer success with a modern approach and experienced leadership. Driven by an entrepreneurial spirit, Cimarron is fueled by highly skilled employees, developing new innovative technologies, and delivering superior products and services. We believe in recognizing employees' worth by offering competitive salaries and benefits, including health, dental, and vision insurance, 401(k) contributions, educational reimbursement, and much more. From company communication through Company-wide information meetings led by our President and CEO, to an Awards program designed to recognize our amazing employees and their accomplishments, you will not only feel like you are a part of a team, you will be a valued member of the Cimarron family. Cimarron is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, age, sex, sexual orientation, gender identity, religion, national origin, disability, veteran status, or any other characteristic protected by federal, state, or local law.
Resumes should list employment dates in month/year format (e.g., January 2020 - March 2024) for each position to meet customer and contract documentation requirements.
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