Senior CPU Verification Engineer - US, Texas, Austin US, Oregon, Hillsboro Onsite

Austin, TX, US • Posted 1 day ago • Updated 1 day ago
Contract Corp To Corp
Contract W2
Contract Independent
Able to Sponsor
On-site
Depends on Experience
Fitment

Dice Job Match Score™

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Job Details

Skills

  • C
  • CPU
  • C++
  • Git
  • RTL
  • UVM
  • Tcl
  • Perl
  • Python
  • ROOT
  • x86
  • Version Control
  • Electronic Engineering
  • Computer Engineering

Summary

Hi,

Hope you are doing well.

This is Rahul from ICS Global Soft. Kindly find the below job description and let me know your availability.

Role: Senior CPU Verification Engineer

Location:: US, Texas, Austin US, Oregon, Hillsboro Onsite

Job Details:

Job Description:

Who You Are

We are seeking a highly motivated senior CPU verification engineer to join our design team. In this role, you will be responsible for driving and executing the functional correctness of CPU logic designs through rigorous pre-silicon verification methodologies. Key Responsibilities:

Senior CPU Verification Engineer

Lead, drive, develop and execute comprehensive verification plans to validate CPU logic againstarchitectural specifications.

Able to build scalable UVM-based testbenches from and define robust functional coverage models.

Run system-level simulations to uncover design bugs and ensure functional integrity.

Debug and root-cause issues in the pre-silicon environment; implement corrective actions to resolvetest failures.

Collaborate closely with CPU architects and RTL designers to verify complex architectural andmicroarchitectural features.

Document verification strategies and lead technical reviews with design and architecture teams.

Maintain and enhance existing verification infrastructure and methodologies.Contribute to the definition and refinement of CPU architecture and microarchitecture features.

Excellent analytical and debugging skills, with a creative approach to problem-solving.

Ability to define and implement validation strategies based on architectural and design insights.

Qualifications:

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

The candidate must have a Bachelor's Degree in Electrical/Electronic Engineering or ComputerEngineering or any STEM related education with at least 4+ years of relevant experience -OR-Master's Degree in Electrical/Electronic Engineering or Computer Engineering or any STEM relatededucation with at least 3+ years of relevant experience.

2+ years of experience in digital logic design, including instruction set execution, ALUs, control units,registers, memory, and system buses.

2+ years of experience in developing UVM-based testbenches for reusable and scalable verificationenvironments.

2+ years of experience in at least one scripting language (e.g., Python, Perl, or Tcl), C++, and SystemVerilog.

Preferred Qualifications

Experience with RTL development

Use of AI agents in Verification

Proficiency with C/C++, System Verilog coding and debug

Knowledge and experience with x86 or any other computer architectures

Familiarity with version control software (GIT).

Experience with Synopsys simulators

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, Texas, Austin

Additional Locations:US, Oregon, Hillsboro

Thanks and Regards,

Rahul

Technical Recruiter
Desk:+1

E-mail:

Linkedin:

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 90962964
  • Position Id: 8940225
  • Posted 1 day ago
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