PCI Express Validation Engineer

San Jose, CA, US • Posted 10 hours ago • Updated 10 hours ago
Contract Corp To Corp
Contract Independent
Contract W2
On-site
Depends on Experience
Fitment

Dice Job Match Score™

🛠️ Calibrating flux capacitors...

Job Details

Skills

  • ARM
  • Embedded Systems
  • Firmware
  • Laboratory Equipment
  • Linux
  • Logic Analyzer
  • Microsoft Windows
  • C
  • C++
  • Collaboration
  • Computer Hardware
  • Data Collection
  • Debugging
  • Perl
  • Python
  • Root Cause Analysis
  • Scripting
  • System On A Chip
  • Test Execution
  • Multimeter
  • Operating Systems
  • Oscilloscope
  • PCI Express
  • Performance Tuning
  • Test Plans
  • Testing
  • Training
  • Workflow

Summary

Position: PCIe Validation Engineer

Location: San Jose, CA

Exp: 5-8 years

PCIe Gen 4/5/6, CXL, RISC-V, ARM, Oscilloscope, Multimeter, Logic & Power Analyzer, BERTS C/C++, Python, Perl, Windows, Linux

  • Take lead responsibility for validating PCIe and its subsystems on multiple SoC platforms.
  • Define comprehensive test plans and execute tests covering memory training procedures, performance benchmarks, stress scenarios, timing margin analysis, and overall reliability.
  • Collaborate with design and firmware teams to develop, integrate, and debug firmware essential for PCIe training. Write necessary firmware components (like bootloaders, PCIe drivers, test hooks) to enable testing.
  • Integrate and debug firmware for PCIe initialization and training, specifically on systems using RISC-V or ARM processors.
  • Work closely with software and hardware teams to ensure firmware and hardware components interact correctly. Coordinate with board and Signal/Power Integrity (SI/PI) teams for related evaluations.
  • Utilize standard lab equipment (oscilloscopes, logic analyzers, BERTs, power analyzers) for test execution, data collection, and troubleshooting memory-related issues. Perform root cause analysis for failures.
  • Develop scripts (Python, Perl, C/C++) to automate test procedures and validation workflows.

5 to 8 years of experience

  • 5+ years of SOC validation experience
  • At least 4 years of experience in post-silicon PCIe subsystem validation
  • Strong C/C++ programming skills, particularly for low-level code (like hardware abstraction layers) used in system bring-up. Proven experience integrating and debugging firmware in PCIe validation or general SoC environments.
  • Deep understanding of PCIe protocols (Physical, Data Link, Transaction layers), PCIe Gen 4/5/6, and CXL
  • Experience with silicon bring-up processes and Hands-on experience with PCIe protocol analyzers and oscilloscopes.
  • Familiarity with embedded operating systems and the typical boot sequences.
  • System-level PCIe performance tuning and characterization.

Experience with Linux and Windows operating systems

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 91139932
  • Position Id: 8905976
  • Posted 10 hours ago
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