Aptino
Aptino

SoC Design Engineer

Remote • Posted 4 hours ago • Updated 3 hours ago
Contract W2
Contract Independent
Contract Corp To Corp
12 Months
No Travel Required
Remote
Depends on Experience
Fitment

Dice Job Match Score™

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Job Details

Skills

  • PCB Design
  • Embedded Systems
  • IP
  • IPS
  • Integrated Circuit
  • Debugging
  • Documentation
  • Electrical Engineering
  • Computer Engineering
  • Conflict Resolution
  • DDR SDRAM
  • Scripting
  • SpyGlass
  • Synopsys
  • System On A Chip
  • Problem Solving
  • RDC
  • RTL
  • Real-time
  • PCI Express
  • Physical Data Model
  • Place And Route
  • English
  • Intellectual Property
  • Optimization
  • PCB
  • Change Data Capture
  • Communication
  • DFT
  • Python
  • ARM
  • Analytical Skill
  • UVM
  • VHDL
  • Verilog
  • C
  • Caching
  • Workflow
  • Collaboration
  • SystemVerilog
  • Tcl
  • Veritas Cluster Server
  • SoC Design
  • SoC Integration
  • Subsystem Architecture
  • SoC Architecture
  • RTL Design
  • IP Integration
  • ARM Processors
  • ARM Cortex-A/R
  • PCIe
  • DDR
  • GPU Integration
  • MMU
  • Cache Coherence
  • SDC Timing Constraints
  • UPF Power Intent
  • CDC
  • RTL Linting
  • Power Analysis
  • Synthesis
  • Design for Test (DFT)
  • Place and Route (P&R)
  • RTL-to-GDS
  • Power Performance Area (PPA) Optimization
  • Timing Closure
  • Synopsys VCS
  • Verdi
  • Design Compiler
  • RTL Architect
  • Tcl Scripting
  • C Programming
  • Physical Design Debugging
  • PCB Design Support
  • Design Quality Flows
  • Timing Analysis
  • Power Optimization
  • Subsystem Verification
  • Technical Documentation
  • Cross-functional Collaboration
  • Communication Skills
  • SoC Design and Implementation
  • SoC Subsystem Integration
  • Architectural Specifications
  • Complex SoC Integration
  • IP Configuration
  • IP Vendor Coordination
  • Processor Integration
  • SDC Constraint Propagation
  • CDC/RDC Flows
  • Design Quality Assurance
  • Power Analysis Flows
  • Synthesis Flows
  • PPA Analysis
  • Timing Optimization
  • DFT Debugging
  • RTL-to-GDS Design Flow
  • ARM Application-Class Processors
  • ARM Real-Time Processors
  • Memory Management Unit (MMU)
  • Cache-Coherent Systems
  • Embedded C Programming
  • RTL Design Methodologies
  • Power and Timing Closure
  • Written and Verbal Communication Skills

Summary

Role: SoC Design Engineer

Location: Remote – US
Duration: 12 Months

Role Overview:

We are looking for an experienced SoC Design Engineer to drive the architecture, integration, and implementation of complex SoC blocks and subsystems. The role involves working across the chip design lifecycle, from subsystem specification and IP integration to synthesis, physical design support, power optimization, and PCB team collaboration.

Key Responsibilities:

  • Define and maintain architectural specifications for SoC subsystems and support top-level SoC integration.

  • Integrate complex IPs, including processors, PCIe, DDR, and other subsystem components, in collaboration with IP vendors.

  • Develop and propagate timing constraints (SDC) and power intent specifications (UPF) from block to SoC level.

  • Establish and maintain design quality flows for CDC, RDC, RTL linting, power analysis, and synthesis.

  • Analyze power, performance, and area (PPA) reports and recommend design optimizations.

  • Support synthesis, DFT, and place-and-route teams in debugging timing, power, and implementation issues.

  • Develop automation scripts using Tcl and Python to improve design and analysis workflows.

  • Support PCB design teams with chip-level integration requirements and interface-related issues.

Minimum Qualifications:

  • Master’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.

  • 4+ years of experience in SoC integration and subsystem design.

  • Proficiency in Verilog, SystemVerilog, or VHDL and familiarity with RTL design methodologies.

  • Experience with CDC/RDC analysis, linting, synthesis, power analysis, and timing constraints.

  • At least 2 years of programming or scripting experience using Tcl, Python, or similar languages.

  • Strong analytical, problem-solving, documentation, and English communication skills.

Preferred Qualifications:

  • Experience integrating ARM application-class or real-time processors, GPUs, MMUs, and cache-coherent systems.

  • Knowledge of RTL-to-GDS implementation flows and basic verification methodologies, including UVM.

  • Hands-on experience with Synopsys tools such as VCS, Verdi, SpyGlass, Design Compiler, and RTL Architect.

  • Basic to intermediate C programming skills for embedded systems.

  • Ability to collaborate effectively with architecture, verification, physical design, IP vendor, and PCB engineering teams.

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 90999382
  • Position Id: 9114388
  • Posted 4 hours ago
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Anchal Khapekar

Recruiter @ Aptino

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