Physical Design Engineer

Role: Lead Physical Design Engineer Location:San Jose, CA (Onsite) Type:Long-Term Contract (C2C) Looking for a Lead Physical Design Engineerwith strong experience infull-chip physical design and verificationfor advanced nodes. Key Skills Physical Design: Floorplanning, PnR, CTS, STAPhysical Verification & Timing ClosureStrong understanding ofRTL, Logic & Circuit DesignHands-on withEDA toolsExperience inTSMC 5nm / 3nmnodes What Youll Do Driveend-to-end physical designfrom floorplan to sign-offR

Physical Design Engineer San Jose, CA (onsite) Long Term Contact Strong experience in RTL synthesis using Cadence GenFusion compiler, including SDC constraint development and QoR optimization (timing, area, power) Hands-on expertise in Static Timing Analysis using Tempus, including setup/hold closure, C scenarios, OCV, and timing signoff concepts Ability to analyze and debug timing violations across synthesis and floorplan stages and drive closure Experience in block-level floorplanning using Ca

Position:Physical Design Engineer Location:Santa Clara CA (Onsite/Hybrid ) Contract/ Fulltime Job Responsibilities: BE/BTECH/MTECH, or equivalent experience.Experience in Physical Design, preferably with methodology/flow experience.Strong understanding in the RTL2GDSII flow or design implementation in leading process technologies. Good understanding of the RTL2GDSIl concepts related to synthesis, place & route, CTS, timing convergence, layout closure.Expertise on high frequency design methodolo

Maxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for a PCB Layout Design Engineer. Job Description: Job Title: PCB Layout Design Engineer Job Type: Contract Job Location: Milpitas, CA Work Schedule: On-site Pay Rate: $64 Based on experience. Job Summary We are seeking an experienced Senior Electrical & PCB Layout Design Engineer to lead the design, development, and validation of complex electrical systems and hardware products