Job Description
The Advanced Packaging Technology Manufacturing (APTM) division at Intel is responsible for the development and commercialization of industry-leading semiconductor packaging technologies for mobile, edge, and hyperscale computing platforms. Within APTM, the Assembly Technology Development (ATD) team pioneers innovative package assembly solutions and scales them for high-volume manufacturing.
The Packaging Module Development Engineer will contribute to advancing technology and foundry capabilities by:
- Developing First Level/Second Level Interconnect (FLI/SLI), Thermal solutions (TIM1/IHS), and SMT/PCB technologies to support Intel?s future packaging platforms.
- Collaborating with multifunctional and cross-organizational teams to optimize assembly processes for quality, reliability, cost, yield, productivity, and manufacturability.
- Innovating next generation materials, equipment, and fabrication processes to enhance semiconductor packaging capabilities at scale.
- Managing projects to meet product development timelines.
- Applying formal education and judgment to solve technical problems.
- Providing sustaining support for equipment performance and process health in high-volume manufacturing.
- Responding promptly to foundry customer requests and events.
The ideal candidate will demonstrate:
- Technical leadership, strategic planning, and critical thinking.
- Ability to coach and develop technical teams.
- Tolerance for ambiguity and adaptability in a dynamic environment.
- Flexibility in managing changing priorities and responsibilities.
- Experience leading teams in a highly matrixed organization.
- Initiative and ability to work independently.
- Strong communication, influencing, technical, and analytical skills.
This position requires regular onsite presence.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position.
Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork, classes, research, relevant previous job, and/or internship experiences. This position is not eligible for Intel immigration sponsorship
Minimum Qualifications
- Master or PhD with +1 year of experience in Materials Science, Mechanical Engineering, Electrical Engineering, Physics/Applied Physics, or a related field.
- Minimum GPA of 3.5.
- At least one publication in a peer-reviewed technical journal.
Preferred Qualifications
- One or more years of experience in any of the following:
- Technology development, including familiarity with Statistical Process Control (SPC) and/or Design of Experiments (DOE).Delivering results for complex, time-critical technical projects.
- Delivering results for complex, time-critical technical projects.Improvements and maintenance on equipment/instrumentation.
- Previous related work experience in a semiconductor foundry.
- Semiconductor fabrication processes and technology.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits
Annual Salary Range for jobs which could be performed in the US $109,600.00-$154,800.00
*Salary range dependent on a number of factors including location and experience
Working Model
This role will require an on-site presence.
* Job posting details (such as work model, location or time type) are subject to change.