Senior Analog Layout Engineer

Cupertino, CA, US • Posted 1 day ago • Updated 23 hours ago
Contract W2
Contract Corp To Corp
Contract Independent
12 Months
No Travel Required
On-site
$50 - $55/hr
Fitment

Dice Job Match Score™

👤 Reviewing your profile...

Job Details

Skills

  • Analoglayout design
  • Synopsys.
  • electro-migration.

Summary

Location: CA

Here is the JD:

Minimum 6+ years of experience in Analog layout design.
Experience developing and leading complex layout IC for high-speed applications in advanced CMOS FinFET technologies such as 7nm and below at the block level and chip level.
Thorough knowledge of industry standard EDA tools from Cadence, Mentor and Synopsys.
Experience with layout of high-performance high-speed analog mixed-signal blocks such Transceivers, CMOS drivers, high-speed Data converters and PLLs.
Experience with floor planning, block level routing and top-level chip assemble.
Knowledge of layout techniques such as floor planning, layer generation, thermal aware layout with consideration for electro-migration.

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 91095471
  • Position Id: 9006702
  • Posted 1 day ago
Contact the job poster
Mahammad Ismaiel

Mahammad Ismaiel

Recruitment Manager @ Apton Inc
Create job alert
Set job alertNever miss an opportunity! Create an alert based on the job you applied for.

Similar Jobs

Cupertino, California

Today

Easy Apply

Contract, Third Party

Depends on Experience

Cupertino, California

Today

Full-time

San Jose, California

Today

Easy Apply

Contract

Depends on Experience

Cupertino, California

Today

Full-time

Search all similar jobs