Analog Layout Design

Location: CA Here is the JD: Minimum 6+ years of experience in Analog layout design. Experience developing and leading complex layout IC for high-speed applications in advanced CMOS FinFET technologies such as 7nm and below at the block level and chip level. Thorough knowledge of industry standard EDA tools from Cadence, Mentor and Synopsys. Experience with layout of high-performance high-speed analog mixed-signal blocks such Transceivers, CMOS drivers, high-speed Data converters and PLLs. Expe

Analog and Mixed-Signal Layout Engineer Job Description The candidate should be able work independently on block level and IP level Analog layout design, coordinating with the circuit designer and the rest of the layout team. The candidate will need to be able to work with both design engineers and mask design engineers in remote locations, and thus the ability to plan and efficiently use email and Webex to review critical aspects of the layout work is essential to this role. The candidate shoul

Join Apple's Silicon Engineering Group (SEG) and be at the forefront of shaping the next generation of Apple's systems-on-chip (SOCs)! Our SOCs, featuring multi-billion transistors, are the heart of iconic devices like iPhones, iPads, and Macs. We're seeking highly skilled Analog Layout engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors. As an Analog Layout engineer, you'll play a crucial role in translating design concepts into sili

Join Apple's Silicon Engineering Group (SEG) and be at the forefront of shaping the next generation of Apple's systems-on-chip (SOCs)! Our SOCs, featuring multi-billion transistors, are the heart of iconic devices like iPhones, iPads, and Macs. We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation and leveraging AI/ML techniques for improved design and e