FPGA Logic Design Engineer

RESPONSIBILITIES:
Kforce has a client that is seeking an FPGA Logic Design Engineer in North Reading, MA.

Summary:
We are seeking an FPGA Logic Design Engineer to support the development of advanced test and instrumentation solutions for next-generation semiconductor technologies. This role focuses on digital and mixed-signal design to enable high-speed, high-precision validation of complex devices, including advanced compute architectures and high-density interfaces.

Key Responsibilities:
* Architect, design, implement, verify, and validate digital test systems and instrumentation
* Collaborate with hardware, software, and systems teams to deliver scalable, high-performance solutions
* Perform hands-on integration, debug, and validation in lab environments
* Partner with verification teams to ensure robust simulation and test coverage
* Develop and execute prototyping and characterization plans
* Provide technical leadership on FPGA-based projects and mentor junior engineers
* Contribute to design process improvements and tool evaluations

REQUIREMENTS:
* Bachelor's degree in Electrical Engineering or related field required
* 10+ years of experience in FPGA and digital logic design within complex hardware development environments
* Strong background in digital logic and FPGA design, including floorplanning, place and route, and timing analysis
* Deep experience with Xilinx and/or Intel FPGA platforms; exposure to ASIC development environments is a plus
* Experience working in cross-functional engineering environments
* Experience with tools such as Vivado, Quartus, Cadence, Synopsys, and version control systems
* Proven experience designing and integrating high-speed interfaces including PCIe, DDR, SERDES, Ethernet, or comparable protocols
* Experience collaborating effectively with hardware, software, systems, and verification engineering teams
* Strong expertise across the full FPGA development lifecycle, including architecture, design, implementation, verification, timing closure, and lab validation
* Familiarity with high-speed interfaces such as PCIe, DDR, SERDES, Ethernet, or similar
* Proficiency in Verilog and scripting (Python, TCL, or similar)
* Strong analytical, communication, and problem-solving skills in fast-paced engineering environments
* Demonstrated ability to perform hardware bring-up, system integration, debugging, troubleshooting, and root-cause analysis in lab environments

Preferred:
* Experience leading FPGA development efforts, driving technical decisions, or mentoring junior engineers
* Experience supporting semiconductor validation, characterization, or advanced compute platforms
* Familiarity with scalable, high-performance system architectures and complex hardware integration efforts
* Exposure to digital and mixed-signal test, measurement, or instrumentation systems

The pay range is the lowest to highest compensation we reasonably in good faith believe we would pay at posting for this role. We may ultimately pay more or less than this range. Employee pay is based on factors like relevant education, qualifications, certifications, experience, skills, seniority, location, performance, union contract and business needs. This range may be modified in the future.

We offer comprehensive benefits including medical/dental/vision insurance, HSA, FSA, 401(k), and life, disability & ADD insurance to eligible employees. Salaried personnel receive paid time off. Hourly employees are not eligible for paid time off unless required by law. Hourly employees on a Service Contract Act project are eligible for paid sick leave.

Note: Pay is not considered compensation until it is earned, vested and determinable. The amount and availability of any compensation remains in Kforce's sole discretion unless and until paid and may be modified in its discretion consistent with the law.

This job is not eligible for bonuses, incentives or commissions.

Kforce is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, or disability status.

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