Verification Engineer(w2 Only, Need loacl to CA only)

Position: FPGA Verification Engineer Location: San Jose, CA - Onsite Job Description & Responsibilities Own verification of entire FPGA design used in high-end router productsUnderstand design specifications and interact with design engineers to identify verification scenariosCreate test plans, constrained-random verification environments, test cases, regressions, and coverage reportsIdentify and write all types of coverage measures for stimulus and corner-casesQualifications Strong academic ba

Job Title: FPGA Verification Engineer Location: Hybrid (4 days at Cisco SJ office and 1 day remote) Duration: 12 months Rounds of interview: There will be a total of 2 rounds: 1 screening, the second will be in-depth with 2 engineers" Job Description Own verification of entire FPGA design used in high-end router products. Understand design specifications and interact with design engineers to identify verification scenarios. Create test plans, constrained-random verification environments, t

Job Title : FPGA Verification Engineer Santa Clara, CA- 5 days onsite Hire Type: Contract Job Description: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability. You will work closely with design engineers to develop and execute verification plans, identify and debug issues, and contribute to the overall qualit

Location: Sunnyvale, CA Salary: $90.00 USD Hourly - $100.00 USD Hourly Description: Job Title: FPGA Design/Verification Engineer Duration: 6+ Months (Possible Extension) Location: Sunnyvale, CA, Possible: onsite Denver CO. Job Description: The selected candidate will be responsible for ASIC & FPGA verification on R&D program. This engineer will be a verification UVM expert. This engineer with have experience: -Verifying FPGA and/or ASIC designs including creating UVM verification environ