Verification Platform Engineer, Platform Architecture

Austin, TX, US • Posted 4 days ago • Updated 8 hours ago
Full Time
On-site
Fitment

Dice Job Match Score™

🔢 Crunching numbers...

Job Details

Skills

  • AIM
  • Bridging
  • Prototyping
  • DV
  • Workflow
  • Research and Development
  • Software Development
  • C++
  • Scripting
  • Perl
  • Python
  • Computer Engineering
  • Electrical Engineering
  • UVM
  • DPI
  • LEC
  • Debugging
  • SystemVerilog
  • Semantics
  • Communication
  • Collaboration
  • Engineering Design
  • EDA
  • Data Analysis
  • Code Optimization
  • High Performance Computing
  • HPC
  • Computer Hardware
  • Emulation
  • Artificial Intelligence
  • Productivity

Summary

Apple's Platform Architecture group develops the next generation of Apple hardware and the tools to make it possible. Our team builds high-performance verification systems that accelerate the development of Apple silicon. We aim to push the boundaries of pre-silicon validation with simulation solutions that apply and extend principles from hardware emulation.

Description

This role bridges Apple's next-generation platform technology with DV methodology and tooling.

We are seeking an engineer with background in Design Verification who is interested in cutting-edge verification techniques and comfortable rapidly prototyping solutions. In this role, you will enable transformational improvements to simulation throughput for DV workflows through testbench design, infrastructure improvements, and platform R&D.

Minimum Qualifications

Bachelor's degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent practical experience).

Experience with SystemVerilog and EDA tooling.

Experience with software development (e.g., using C++) and scripting (e.g., Perl or Python).

Preferred Qualifications

Master's degree in Computer Engineering, Electrical Engineering, or another hardware-related field.

10+ years of relevant experience.

Deep hands-on experience in Design Verification methodologies (UVM, DPI-C, testbench architecture).

Experience applying LEC, linting / static analysis tools, waveform debugging, and simulation / emulation flows.

Strong understanding of SystemVerilog simulation semantics (events, time, glitches); intuitive grasp for hardware representation (clocks, resets, latches).

Strong communication skills, with a proven history of cross-functional collaboration across silicon engineering, design verification, and EDA development teams and organizational boundaries.

Experience with software optimization, high-performance computing (HPC), co-simulation architectures, or hardware acceleration / emulation.

Development of agentic pipelines, graphs, skills, or similar work enabling AI productivity for other engineers.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 90733111
  • Position Id: e98b77cadd3cb6ea610229bd8ccb25fa
  • Posted 4 days ago
Create job alert
Set job alertNever miss an opportunity! Create an alert based on the job you applied for.

Similar Jobs

Austin, Texas

3d ago

Full-time

USD 161,500.00 - 218,500.00 per year

Austin, Texas

Today

Full-time

Austin, Texas

3d ago

Full-time

USD 249,900.00 - 338,100.00 per year

Remote or Austin, Texas

Today

Full-time

USD 156,100.00 per year

Search all similar jobs