Post Silicon Validation Engineer

.Validate ML-Coprocessor, display SOC, Mixed Signal SOC, and IP. Define validation strategy and test plans for new IP blocks, aligning with RTL, architecture, FW. Develop silicon validation infrastructure and coding C/C++ and Python for emulation (Zebu), FPGA (HAPS), and first silicon platforms. Identify risks and develop mitigation strategies .Execute bring-up/debug, workload enablement, and ML accelerator SW stack validation Perform performance and power characterization under real ML workload

Post Silicon Validation We have an immediate opportunity for a Post Silicon Validation Engineer to support validation activities for advanced ML Coprocessors, Display SoCs, Mixed Signal SoCs, and complex IP blocks. The ideal candidate will be responsible for defining silicon validation strategies, creating comprehensive test plans, and collaborating closely with RTL, architecture, firmware, and software teams to ensure robust validation coverage across the product lifecycle. To be successful in

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the techn