Hardware Design Engineer

San Jose, CA, US • Posted 1 day ago • Updated 1 day ago
Contract W2
Contract Independent
12 Months
No Travel Required
On-site
$65 - $70/hr
Fitment

Dice Job Match Score™

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Job Details

Skills

  • Collaboration
  • Network
  • Optimization
  • PCB
  • Python
  • Signal Integrity
  • International Relations
  • Investor Relations
  • High Performance Computing
  • Electrical Engineering
  • Firmware
  • Hardware Development
  • Firmware Development
  • HFSS
  • Information Retrieval
  • Computer Engineering
  • Computer Hardware
  • Debugging
  • MATLAB
  • DDR SDRAM
  • Modeling

Summary

We are seeking an experienced Hardware Design Engineer to join our client's CT Server DDR engineering team. This is an exciting opportunity for a hands-on hardware engineering professional with strong expertise in DDR PHY channel architecture, signal integrity, power delivery network (PDN) design, system-level simulations, and post-silicon validation.

The ideal candidate will drive SI/PI architecture, perform advanced channel and PDN modeling, correlate simulation results with silicon measurements, and troubleshoot complex hardware issues across silicon, package, and board-level environments.

 

Key Responsibilities

  • Develop and define DDR PHY channel architecture and Power Delivery Network (PDN) strategies.
  • Perform system-level SI/PI simulations, including insertion loss, return loss, crosstalk, eye diagrams, impedance, IR drop, and jitter analysis.
  • Analyze and process post-silicon SI/PI validation data and correlate measurements with simulation results.
  • Debug signal integrity and power integrity issues across silicon, package, and board-level designs.
  • Collaborate with hardware, design, package, board, and firmware teams to define and implement SI/PI specifications and targets.
  • Support channel modeling, PDN optimization, and decoupling implementation.
  • Drive system-level hardware validation and troubleshooting across the full platform.

Required Skills & Experience

  • 9+ years of experience in Hardware Design, Signal Integrity (SI), and Power Integrity (PI) engineering.
  • Strong understanding of DDR PHY architecture, high-speed channel modeling, and system-level SI/PI.
  • Hands-on experience with S-parameter/Z-parameter analysis, channel modeling, and PDN modeling.
  • Experience with SI/PI simulation tools such as:
    • Ansys HFSS, SIwave
    • Cadence Sigrity, Clarity
  • Experience with post-silicon validation and silicon-to-simulation correlation.
  • Strong hardware debugging skills across silicon, package, and PCB/board environments.
  • Experience working with firmware and hardware teams on platform-level debug.

Preferred Qualifications

  • Strong programming skills in Python and/or MATLAB.
  • Experience with firmware development for ATE and hardware validation platforms.
  • Knowledge of impedance analysis, decoupling strategies, jitter transfer, and power delivery optimization.
  • Experience supporting complex server or high-performance computing platforms.

Education

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 91027520
  • Position Id: AT2014
  • Posted 1 day ago
Contact the job poster
SD

Sudhir Dubey

Recruiter @ VGAI Solutions Inc

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