RTL Design Engineer

RTL Design Engineer Key Responsibilities Own micro-architecture definition from high-level functional specificationsDevelop and implement RTL for complex digital blocksDrive digital block control and IP integrationParticipate in subsystem-level architecture alignmentSupport design sign-off activities (CDC, RDC, lint, synthesis readiness)Collaborate closely with DV for closure and debugRequired Qualifications Strong expertise in RTL design (SystemVerilog/Verilog)Experience defining micro-architec

R-069895 RTL Design Engineer Wireless SoC (Remote PST) Location: Remote (must be aligned with PST time zone / willing to work PST hours) We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate will design and implement high-performance digital blocks and work closely with architecture, analog/mixed-signal, and verification teams to deliver production-quality silicon. Required Skills 5+ years of hands-on RTL design experience (

Business Title: CDC/RDC DFT Engineer Location: Milpitas, CA Job Type: Contract (12 M+) Work Setting: Remote Job Description: Senior Clock Domain Crossing (CDC) Contractor to support our engineering team. This is a critical, short-term engagement focused on maintaining design integrity during a transition period. The ideal candidate will serve as a subject matter expert in CDC analysis and ASIC Design-for-Test (DFT) constraints.Leading the CDC/RDC (Clock Domain Crossing / Reset Domain Crossing)

About Aalyria: Aalyria is a leading technology company that supplies laser communications technology and temporospatial software-defined networking platforms to the aerospace industry. With technology acquired from Google, Aalyria is at the forefront of innovation in satellite and airborne mesh networks, as well as cislunar and deep-space communications. We are revolutionizing the orchestration and management of planetary mesh networks using any radio or optical spectrum, any orbit, and any har