IC Packaging Design Engineer

Location: Chandler, AZ Salary: Negotiable Description:
Job Description:

We are seeking experienced IC Packaging Design Engineers to support advanced semiconductor packaging programs. The ideal candidates will possess strong expertise in package and substrate design, with hands-on experience in leading package design tools and a deep understanding of performance, manufacturability, and reliability considerations.

Key Responsibilities

• Develop and implement physical design and layout solutions for advanced IC packages.
• Perform substrate design and package layout activities while ensuring adherence to design specifications.
• Execute signal integrity (SI) and power integrity (PI) aware package designs.
• Optimize package designs for performance, manufacturability, yield, reliability, and cost efficiency.
• Ensure compliance with package design rules, technology constraints, and industry standards.
• Collaborate with cross-functional teams including silicon, system, SI/PI, manufacturing, and reliability engineering teams.
• Support design reviews, issue resolution, and continuous process improvements throughout the product development lifecycle.

Preferred Experience

• Candidates should demonstrate expertise in one or more of the following areas:
• Physical package design and layout.
• Substrate design and routing methodologies.
• SI/PI-aware package implementation.
• Design for manufacturability (DFM), design for reliability (DFR), and yield optimization.
• Package design rule verification and compliance.
• Advanced semiconductor packaging technologies, including multi-die, SiP, or high-performance package solutions.

Qualifications

• Bachelor's or Master's degree in Electrical or Electronics Engineering.
• Senior-Level: 10+ years of experience in IC packaging and package design.
• Mid-Level: 4-6 years of experience with a Master's degree or 6+ years with a Bachelor's degree in IC packaging and package design.
• Strong communication skills and the ability to work effectively in a cross-functional engineering environment.

Required Technical Skills

• Strong hands-on experience with Siemens (Mentor) Xpedition (XPD).
• Alternative experience with Cadence Allegro, Advanced Package Designer (APD), or SiP tools is also acceptable.

Solid understanding of semiconductor packaging technologies, package architectures, and substrate design methodologies
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