Design Verification Engineer

Location: Sunnyvale, CA Salary: $90.00 USD Hourly - $100.00 USD Hourly Description: Job Title: FPGA Design/Verification Engineer Duration: 6+ Months (Possible Extension) Location: Sunnyvale, CA, Possible: onsite Denver CO. Job Description: The selected candidate will be responsible for ASIC & FPGA verification on R&D program. This engineer will be a verification UVM expert. This engineer with have experience: -Verifying FPGA and/or ASIC designs including creating UVM verification environ

Job Title: "Design Verification Engineer (GPU)" Location: San Jose, CA (Onsite, 5 days a week) Duration: Long Term Description As a GPU Design Verification Engineer, your talents will ensure the quality at the heart of our GPU architecture. Creativity is a necessity to overcome the challenges inherent to verifying the proper operation of our low-power GPU. Versatility and broad knowledge of state-of-the-art verification techniques including the most up-to-date I UVM version will place you among

Job Title: GPU Design Verification Engineer Location: San Jose, CA (Onsite) Duration: 6+ months (Contract) with the possibility of extension Job Description: We are seeking a highly skilled Design Verification Engineer to join our team at Samsung SARC/ACL. The successful candidate will be responsible for verifying the functionality and performance of our cutting-edge GPU designs. Your primary focus will be on developing and executing verification plans, creating testbenches, and debugging compl

Role: Senior/Staff VLSI Engineer Ethernet FEC DV Duration: 12+ Months Location: San Jose, CA || Onsite Role Job Description-: We are seeking a highly skilled and motivated VLSI Design Verification Engineer with deep expertise in Forward Error Correction (FEC) and Ethernet protocols. In this role, you will own the verification of advanced FEC IP cores (RS-FEC, KR/KP4, or next-gen) within high-speed Ethernet controllers (25G/50G/100G/200G/400G+). You will develop sophisticated UVM environments, d