Senior ASIC Design Architect

***Candidates must be currently authorized to work in the United States on a full-time, permanent basis. StaffRight Associates and our clients do not provide visa sponsorship for this position.

PLEASE DO NOT APPLY IF YOU DO NOT MEET THESE ABOVE QUALIFICATIONS

Base pay, bonus, outstanding retirement programs!

The Mission

StaffRight Associates has been retained to lead an exclusive search for a Senior ASIC Design Architect to spearhead the development of custom, high-performance silicon for next-generation compute environments. This role is not merely about RTL implementation; it is a mission-critical position focused on the structural alignment of security-hardened architectures and complex System-on-Chip (SoC) ecosystems.

The successful lead will bridge the gap between abstract customer requirements and physical tape-out, orchestrating the synthesis of advanced ARM-based subsystems while ensuring systemic resilience in high-stakes datacenter and emerging tech applications. We are seeking a technical visionary who thrives in lean, high-velocity engineering environments and possesses the architectural maturity to own the entire silicon lifecycle.

Core Technical Objectives

• Synthesize comprehensive micro-architectural specifications from initial conceptual frameworks, transforming high-level client objectives into executable hardware designs.

• Engineer robust security frameworks by integrating hardware-level Root-of-Trust (RoT) and multi-layered cryptographic defenses to ensure systemic integrity.

• Formalize Reliability, Availability, and Serviceability (RAS) protocols, deploying sophisticated error-detection and fault-injection methodologies to harden interconnect fabrics.

• Orchestrate the integration of complex debug and trace subsystems, utilizing advanced ARM-based instrumentation to facilitate deep-silicon visibility and hardware-software co-validation.

• Validate design integrity through rigorous technical reviews and cross-functional alignment, ensuring that the silicon architecture meets the stringent performance and security demands of modern datacenter environments.

• Deploy technical leadership in client-facing technical deep-dives, acting as the primary engineering liaison to refine specifications and ensure the successful delivery of custom ASIC solutions.

Candidate DNA

• Academic Foundation: A minimum of a Bachelor of Science in Electrical Engineering (BSEE) is required, though an MSEE or higher is preferred to match the theoretical depth of the role.

• Silicon Lifecycle Mastery: Extensive experience (10–25 years) in the front-end ASIC/SoC development lifecycle, with a proven history of taking complex designs from initial "clean sheet" specifications through successful tape-out.

• Security & ARM Ecosystem Expertise: Deep technical fluency in ARM-based architectures, specifically regarding TrustZone implementation, Memory Management Units (MMU/MPU), and the deployment of secure boot sequences and tamper-detection mechanisms.

• Debug & Instrumentation Proficiency: Advanced knowledge of standard trace and debug architectures, including the configuration of external debug interfaces and software-to-hardware diagnostic tools.

• Systemic Resilience: Demonstrated success in implementing error-reporting and fault-management systems within high-performance fabrics.

• Operational Agility: A professional background characterized by stability and the ability to operate autonomously within high-impact, small-team structures where individual technical contributions directly dictate project success.

Partnering with StaffRight Associates At StaffRight Associates, we operate at the intersection of technical synthesis and structural alignment. We don’t just match resumes to keywords; we map your engineering DNA—your architectural philosophy, your approach to system resilience, and your "Goal-Execution-Mapping"—to the most sophisticated STEM challenges in the industry. When you partner with us, you are engaging with a team that speaks your language and understands the nuances of high-stakes innovation. We are committed to placing elite talent where their technical contributions drive systemic impact.