SoC Validation Engineer Post-Silicon

Position: SoC Validation Engineer Post-Silicon

Location: Sunnyvale, CA Onsite
Experience: 10+ Years
Employment Type: Contract

Position Overview

We are looking for a highly experienced SoC Validation Engineer with strong hands-on experience in post-silicon validation of complex ASIC/SoC designs.

The ideal candidate will have a strong background in functional and performance validation of SoC/ASIC components, including developing and executing validation tests, debugging silicon failures, performing root-cause analysis, and working closely with design, firmware, architecture, and system teams.

Experience validating Networking ASICs is highly preferred. Candidates with strong CPU, GPU, or AI Accelerator ASIC/SoC validation experience will also be considered.

Key Responsibilities

• Drive post-silicon validation of complex ASIC/SoC components from first silicon through production.
• Develop detailed validation strategies, test plans, test cases, and automated test content.
• Perform functional and performance validation of SoC components and IP subsystems.
• Bring up first silicon and execute validation tests on silicon platforms.
• Develop tests to validate functional behavior, performance, reliability, and system-level operation.
• Debug failures observed during post-silicon testing and perform detailed root-cause analysis.
• Analyze silicon failures and work with RTL/design, firmware, architecture, and driver teams to identify and resolve issues.
• Validate SoC subsystems such as Ethernet/networking, clock, reset, controllers, and other integrated ASIC IPs.
• Characterize ASIC/SoC performance across different operating conditions, including voltage, frequency, and temperature.
• Develop and maintain Python/Perl/Tcl/C/C++ based automation and validation frameworks.
• Create automated regression tests, log-parsing utilities, and test-result analysis tools.
• Use appropriate silicon debug methodologies and tools including JTAG, DFT/DFx, trace/debug tools, logic analyzers, and protocol analyzers.
• Track validation coverage, failures, bugs, and known issues.
• Prepare validation plans, debug reports, coverage reports, and technical documentation.
• Participate in silicon bring-up, failure triage, bug reviews, and cross-functional debug meetings.
• Mentor junior engineers and contribute to improving validation methodologies and automation.

Required Qualifications

• 10+ years of experience in ASIC/SoC validation or closely related semiconductor engineering.
• Strong post-silicon validation experience is mandatory.
• Hands-on experience with functional and performance validation/debug of ASIC/SoC components.
• Strong understanding of SoC architecture, ASIC design concepts, IP integration, and silicon validation.
• Proven experience developing and authoring validation tests/test content.
• Strong silicon debug and root-cause analysis skills.
• Experience with Networking ASICs is strongly preferred.
• Alternatively, strong experience validating CPU, GPU, AI Accelerator, or other complex ASIC/SoC products.
• Strong scripting/programming skills in Python, C/C++, Perl, Tcl, or similar languages.
• Experience working closely with ASIC design, RTL, firmware, architecture, BSP/driver, and system teams.
• Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, or a related technical field.

Preferred Qualifications

• Pre-silicon validation/verification experience.
• Ethernet or networking ASIC validation experience.
• Experience with packet/data-path validation and performance characterization.
• Experience with automated silicon validation/regression frameworks.
• Experience with JTAG, DFT/DFx, trace, and silicon debug methodologies.
• Experience validating complex IP subsystems such as Ethernet, clock/reset, controllers, and other SoC infrastructure.
• Experience with VFT/PVT characterization and silicon performance analysis.