Analog Mixed Signal IP Integration Engineer

San Francisco, CA, US • Posted 30+ days ago • Updated 1 hour ago
Full Time
On-site
Fitment

Dice Job Match Score™

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Job Details

Skills

  • Mixed-signal Integrated Circuit
  • Intellectual Property
  • IP
  • Modeling
  • PCI Express
  • MIPI
  • USB
  • Communication
  • RTL
  • Static Timing Analysis
  • Change Data Capture
  • RDC
  • System On A Chip
  • DFT
  • Writing
  • Verilog
  • SystemVerilog
  • SVA
  • Computer Hardware

Summary

At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and especially motivated Analog Mixed Signal IP Integration Engineer! As a member of our dynamic group, you will have the rare and great opportunity to work on upcoming products that will delight and encourage millions of Apple's customers every day!

Description

In this highly visible role, you will support the integration of 3rd party IP in the SOCs developed by Apple. Your job is to verify that the IP deliverables are meeting Apple's high quality standards and get flawlessly integrated. The role involves working closely with different cross-functional teams within Apple as well as with external vendors. Occasional travel might be required.

Minimum Qualifications

BSEE/MSEE and 7+ years industry related experience.

Preferred Qualifications

Experience with Verilog modeling and model validation is a plus

Experience with standards like PCI Express, MIPI, USB or DisplayPort is a plus

Excellent written and verbal communication skills

Strong initiative and ownership of responsibilities, productive, able to meet aggressive deadlines

Experience in RTL design, verification or integration

Deep knowledge and experience with front-end tools such as simulation, synthesis, lint, logic equivalence, static timing analysis, CDC, RDC, and UPF

Familiarity with SOC design flow and verification methodologies

Good understanding of DFT requirements for SOCs

Experience writing Verilog, SystemVerilog, SVA hardware description languages
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 90733111
  • Position Id: 5ba131a22dfff437eee7b040603c141a
  • Posted 30+ days ago
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