ASIC/RTL Design Engineer

Title: ASIC RTL Design Engineer - Onsite Mandatory skills: SoC Architecture, ASIC design flow, RTL coding, debugging, verification, supporting synthesis, timing closure, ARM cores, I/O standard interfaces, Ethernet, DDR, DMA, PCIE, SATA, internal IPs, digital CMOS processes, SoC design, Chip definition, Architecture development, modeling, micro-architectural specifications, micro-architectural specifications, logic implementation, emulation, debug Description: JOB DUTIES: The work will expose th

In-Person Interview Required! SoC RTL Design Engineer San Jose, CA: 100% Onsite 6 + Months $60-$62.50/HR Role: Design and develop advanced SoCs across architecture, RTL, and verification. Responsibilities: RTL design, verification, and debugging Support synthesis and timing closure Work with ARM cores, DDR, PCIe, Ethernet, and IP Collaborate with design and bring-up teams Qualifications: Experience in ASIC/SoC design and RTL coding Knowledge of ARM and standard I/O interfaces Dexian stands a

Role: Senior Design Verification Engineer Location -Sunnyvale, CA-Onsite No of Positions - 2 Exp needed - 8 to 10 yrs Duration - Longterm Here is the JD: Responsibilities Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root-cause, and re

Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Sophisticated, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies