San Jose, California
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Today
Role - DDR EngineerLocation -San Jose CAKey skills: Zebu, FPGA, DR (All generations), ARM, DDR PHY, logic analysers, oscilloscopes, and simulation waveformsJob DescriptionEnsuring DDR PHY and controller designs adhere strictly to JEDEC standards (DDR4/DDR5/LPDDR5/LPDDR6)Using simulators (e.g., VCS) and emulators (e.g., Synopsys ZeBu, Cadence Palladium) to debug design failures and root cause issues before tape-out.Validating power-sensitive LPDDR5 states, including self-refresh and deep power-do
Easy Apply
Contract, Third Party
$60 - $75



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