ASIC Design Engineer jobs

FPGA/ASIC Design Engineer (Silicon Engineering)

Redmond, Washington

•

Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the worl

Full-time

USD 125,000.00 - 165,000.00 per year

FPGA/ASIC Design Engineer (Silicon Engineering)

Irvine, California

•

Today

Full-time

USD 125,000.00 - 160,000.00 per year

FPGA / ASIC Design Engineer

Bedford, Massachusetts

•

Today

At MITRE, your passion fuels work that impacts our nation and improves lives. This is where your skills strengthen national security, cybersecurity, health, transportation, and citizen services. We're a nonprofit engineering, applied research, and advanced technology organization working in the public interest. With objectivity and integrity at our core, we lead federally funded research and development centers for U.S. government agencies - collaborating with industry and academia to deliver in

Full-time

USD 103,600.00 - 129,500.00 per year

ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs

Cupertino, California

•

Today

Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We have data center locations in the U.S., Europe, Singapore, and Japan, and customers across all industries.Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you?ll be responsible for the design and optimization of h

Full-time

ASIC RTL Design Engineer - Memory PHY

Boxborough, Massachusetts

•

Today

ASIC RTL Design Engineer - Memory PHY Boxborough, MA (Hybrid) 12 + Months Must have strong ASIC/Digital Design, RTL Coding (Verilog/SystemVerilog), C/C++, Synthesis, Timing Closure, and CDC experience. Plus: DDR/LPDDR, Memory PHY, high-speed interface design, and Python/TCL scripting. Dexian stands at the forefront of Talent + Technology solutions with a presence spanning more than 70 locations worldwide and a team exceeding 10,000 professionals. As one of the largest technology and profession

Easy Apply

Contract

ASIC Design Lead / Senior Chip Design Engineer

Remote

•

20d ago

Role:ASIC Design Lead / Senior Chip Design Engineer Location:REMOTE Duration: 12 months Contract Job Description What Youll Do Architecture and Chip Definition Lead ASIC architecture development from high-level requirements and block diagrams. Work with system architects to define chip functionality, interfaces and performance goals. Write detailed specifications for chip components and subsystems. RTL Design and Synthesis Develop RTL designs and run synthesis with Synopsys Design Compiler. Tun

Easy Apply

Contract

95 - 105

ASIC RTL DESIGN Engineer

Remote

•

Today

REMOTE OFFSITE: FROM HOME 2 Contract positions interviewing now, for Mid November start dates: 12-18 Months + CONTRACT SENIOR ASIC RTL Design (need ASIC-RTL Design not FPGA) Strong Verilog High Speed Memory Interface Experience AXI bus Multiclock Domain Designs Logic synthesis & Timing constraints Forward Error Correction (FEC), Bit Rate Error (BER) calculations Integrating Soft IP from Industry Standard and Custom IP into the design Bandwidth calculation Plusses: LPDDR5 UFS/Flas.1 PCIe Gen3/4/

Easy Apply

Contract

100 - 140

ASIC/RTL Design Engineer 5

San Jose, California

•

14d ago

ASIC/RTL Design Engineer 5 - 2 - San Jose Experience - 10+ Years preferable JOB DUTIES: You will build behavioral models of analog and mixed-signal circuits (PLLs, clocking, ADC/DAC, TX/RX analog front ends, calibration loops) in SystemVerilog. Those models drop into a SystemVerilog UVM verification environment used for high-speed SerDes and SoC IP. You will work closely with analog circuit designers, RTL designers and verification engineers. Successful candidates will be responsible for leadin

Easy Apply

Contract, Third Party

Depends on Experience

ASIC/RTL Design Engineer Analog & Mixed-Signal Modeling (SystemVerilog/UVM)

San Jose, California

•

6d ago

We are seeking an experienced ASIC/RTL Design Engineer with strong hands-on expertise in RTL coding, Analog/Mixed-Signal Design, and SystemVerilog Behavioral Modeling. The ideal candidate will have experience developing behavioral models of complex analog and mixed-signal circuits, including PLLs, ADC/DAC, clocking circuits, and high-speed SerDes TX/RX analog front ends. You will work closely with Analog Design, RTL Design, and Verification teams to develop, integrate, and validate high-performa

Easy Apply

Contract

70 - 75

ASIC/FPGA Design Verification Engineer

El Segundo, California

•

Today

This posting is for a contract assignment and is not a full-time employment offer with Boeing. Candidates selected for roles will be employed as contract workers through a Boeing approved 3rd party for the duration of the specified project. Analyzes customer and system requirements to develop basic architectural approaches and detailed specifications for various electronic products. Develops high-level and detailed designs consistent with requirements and specifications. Validates designs throug

Full-time

Next-Gen System Cache ASIC Digital Design Engineer

San Diego, California

•

Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (

Full-time

USD 121,800.00 - 182,600.00 per year

ASIC/FPGA Design Verification Engineer (Teradyne, N. Reading, MA)

Reading, Massachusetts

•

Today

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world! We

Full-time

USD 98,700.00 - 157,900.00 per year

Advanced ASIC FPGA Design Engineer

Scottsdale, Arizona

•

Today

Basic Qualifications Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience. CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified

Full-time

USD 135,396.00 - 150,205.00 per year

ASIC / FPGA Design Verification Engineer - (Lead or Senior)

El Segundo, California

•

Today

ASIC / FPGA Design Verification Engineer - (Lead or Senior) Company: Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC/ FPGA Design Verification Engineers - (Lead or Senior) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products in El Segundo or Huntington Beach, CA. Mission Develop scalable technical leaders who combine strong verification fundamentals, fluent UVM capability, technical ownership, systems awareness,

Full-time

USD 146,200.00 - 197,800.00 per year

ASIC / FPGA Digital Design Engineer - (Associate or Experienced)

El Segundo, California

•

Today

ASIC / FPGA Digital Design Engineer - (Associate or Experienced) Company: Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC/ FPGA Digital Design Engineers - (Associate or Experienced) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products to support advanced digital subsystem development in an aerospace environment in El Segundo or Huntington Beach, CA. Engineers may support ASIC, FPGA, or mixed ASIC/FPGA development

Full-time

USD 98,600.00 - 133,400.00 per year

ASIC / FPGA Digital Design Engineer - (Lead or Senior)

El Segundo, California

•

Today

ASIC / FPGA Digital Design Engineer - (Lead or Senior) Company: Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC/ FPGA Digital Design Engineers - (Lead or Senior) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products to support advanced digital subsystem development in an aerospace environment in El Segundo or Huntington Beach, CA. Engineers may support ASIC, FPGA, or mixed ASIC/FPGA developments depending on progr

Full-time

USD 146,200.00 - 197,800.00 per year

Front-End ASIC Digital Design, Sr. Staff Engineer -18423

Austin, Texas

•

Today

Descriptions & Requirements Job Description and Requirements About the Role We are seeking a Front-End ASIC Design Engineer with hands-on experience taking RTL from specification through design sign-off. You will own RTL blocks for high-performance SoCs, drive synthesis and timing closure quality at the front-end boundary, and ensure designs are clean against lint, CDC/RDC, timing, and power sign-off criteria before hand-off to physical design. What You'll Be Doing: Drive front-end sign-off: s

Full-time

RTL + SD Design Engineer – Memory Subsystem (ASIC/SoC)

Hybrid in San Jose, California

•

4d ago

We are looking for an experienced RTL + SD Design Engineer with strong hands-on expertise in Verilog RTL development, memory subsystem design, synthesis, and standard-cell-based design implementation. The ideal candidate should have experience working across RTL design and the downstream design flow, including synthesis, physical implementation, timing analysis, and design closure. Key ResponsibilitiesArchitect and design memory subsystems for ASIC/SoC platforms. Develop, implement, and debug sy

Easy Apply

Contract

70 - 75

ASIC / FPGA Design Verification Engineer - (Associate or Experienced)

El Segundo, California

•

Today

ASIC / FPGA Design Verification Engineer - (Associate or Experienced) Company: Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design Verification Engineers to join us as part of our Boeing Electronic Products team at the heart of Boeing's products in El Segundo or Huntington Beach, CA. Mission Develop adaptable verification engineers who build strong technical fundamentals, become independent owners of assigned scope, and grow from guide

Full-time

USD 98,600.00 - 133,400.00 per year

Staff Engineer, ASIC Digital Design

Minneapolis, Minnesota

•

Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff Digital Design Engineer in Micron's ASIC logic design team, you will be engaged in the design of the next generation of Micron's internally developed ASICs and controller IP. The ideal c

Full-time

USD 150,000.00 - 256,000.00 per year