ASIC Jobs in California

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Digital ASIC Design Engineer

Qualcomm Technologies

San Diego, CA, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (bl

ASIC Design Engineer

Jobot

San Jose, CA, USA

Full-time

This Jobot Job is hosted by: Maria Reyes Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume. Salary: $120,000 - $150,000 per year A bit about us: Join our dynamic team! We are a leading innovator in HD video technology. Since 2014 we revolutionized the video surveillance market with the introduction of HD-TVI (High Definition Transport Video Interface). Our groundbreaking technology has earned widespread acclaim, becoming the preferred choice for tier

Senior ASIC Design Engineer

Jobot

San Jose, CA, USA

Full-time

This Jobot Job is hosted by: Maria Reyes Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume. Salary: $140,000 - $220,000 per year A bit about us: Join our dynamic team! We are a leading innovator in HD video technology. Since 2014 we revolutionized the video surveillance market with the introduction of HD-TVI (High Definition Transport Video Interface). Our groundbreaking technology has earned widespread acclaim, becoming the preferred choice for tier

ASIC/RTL Design Engineer at Santa Clara, CA

Infobahn Softworld Inc.

Santa Clara, CA, USA

Contract

Role Title: ASIC/RTL Design Engineer Location: Santa Clara, CA Duration: 12+ months contract Knowledge/Experience: 1. Knowledge in running synthesis using Design Compiler or any equivalent tool. 2. Knowledge of standard cell different views used for physical implementation and timing 3. Creating basic timing constraint for synthesis 4. Use standard cells to do Place and Route using tools like ICC2 or equivalent, run physical verification 5. Run timing report on ICC2 implemented design fo

ASIC Hardware Engineer

Qualcomm Technologies

San Diego, CA, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: At Qualcomm, we believe in the power of technology. For decades, our innovations have transformed entire industries, improved billions of lives, and addressed many of society's biggest challenges. With the world becoming increasingly connected, we have a tremendous opportunity to shape a better future. As an R&D engine that has revolutionized the way people connect, our appro

ASIC Design Verification Engineer (Security Group)

Qualcomm Technologies

San Diego, CA, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems,Digital/Analog/RF/opticalsystems, equipm

Next-Gen, High-Speed Memory Subsystem, Low-power ASIC design engineer

Qualcomm Technologies

San Diego, CA, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is the world leader in wireless ICs powering the majority of 4G and 5G devices and the largest fabless semiconductor company in the world. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills, and a focus on low power, high performance ASIC designs, and, ability to execute critical power analysis of critical design IPs for pat

ASIC Design Engineer, San Diego - Multiple Levels

Qualcomm Technologies

San Diego, CA, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: Plans, designs, and develops electronic systems, circuits, components, integrated circuitry, mechanical systems, equipment and packaging, optical systems, and/or DSP systems. Conducts simulations and analyses of designs. Develops emulation solutions. Evaluates, characterizes, and develops the manufacturing solution for leading-edge products in the most advanced processes. Int

ASIC Design Verification Engineer (San Diego, CA)

Qualcomm Technologies

San Diego, CA, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (bl

Graphics ASIC Hardware Design Engineer

Qualcomm Technologies

San Diego, CA, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: At Qualcomm, we believe in the power of technology. For decades, our innovations have transformed entire industries, improved billions of lives, and addressed many of society's biggest challenges. With the world becoming increasingly connected, we have a tremendous opportunity to shape a better future. As an R&D engine that has revolutionized the way people connect, our a

ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm Technologies

Santa Clara, CA, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This i

ASIC Engineer

Maxonic, Inc.

Sunnyvale, CA, USA

Contract, Third Party

Maxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for an ASIC Engineer. Job Description: Job Title: ASIC Engineer Job Location: Sunnyvale CA Work Schedule: Onsite Pay rate: $75/hr Responsibilities: As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Facebook s data center applications. You will be responsible for the ve

Senior ASIC Verification Engineer

CIENA Corporation

Petaluma, CA, USA

Full-time

Ciena is committed to our people-first philosophy. Our teams enjoy a culture focused on prioritizing a personalized and flexible work environment that empowers an individual's passions, growth, wellbeing and belonging. We're a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact. Why Ciena: You will be a member of a successful team working at forefront of technological innovation focused on innovative technol

Senior ASIC Design Engineer

Cynet Systems

Santa Clara, CA, USA

Contract, Third Party

We are looking for Senior ASIC Design Engineer for our client in Santa Clara, CA Job Title: Senior ASIC Design Engineer Job Location: Santa Clara, CA Job Type: Contract Job Description: Pay Range $50.64hr - $75hr Knowledge and Experience: Knowledge in running synthesis using Design Compiler or any equivalent tool.Knowledge of standard cell different views used for physical implementation and timing.Creating basic timing constraints for synthesis.Use standard cells to do Place and Route using t

ASIC Engineer, Implementation

Meta Platforms, Inc. (f/k/a Facebook, Inc.)

Sunnyvale, CA, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) is hiring ASIC Engineer, Implementation to Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, Power. (Ref code(s) REQ-2401-131621: $244020 - $274000). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include bonus or equity or sales incentives, if applicable. I

ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)

Sunnyvale, CA, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) is hiring ASIC Engineer, Design Verification to Define and implement IP/SoC verification plans, and build verification test benches to enable IP/sub-system/SoC level verification. (Ref code(s) REQ-2401-131716: $169540 - $190000). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include bonus or equity or sales incentives, if applicable

ASIC Verification Engineer

Q1 Technologies, Inc.

Remote or Santa Clarita, CA, USA

Full-time, Contract, Third Party

Job Title : ASIC Verification Engineer Location: Bay Area, CA & Austin, Texas (Onsite only) Opening 10 Mandatory Skills: Design Verification, UVM, IP, SOC, System Verilog Job Description: Experience in pre-silicon RTL Verification /IP Verification / SOC verification Strong knowledge of System Verilog and working knowledge of recent verification methodologies (UVM) Domain expertise in one or more of the following areas System-on-a-chip verification with multiple CPUs and fixed function units

ASIC RTL / SoC Design Engineer

TetraMem Inc

Fremont, CA, USA

Full-time

Responsibilities: Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring robust and efficient designs. Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility. Thoroughly comprehend both internal and external requirements, conducting Power, Performance, and Area (PPA) analysis to optimize design trade-offs. Collaborate closely with the backend team, participating in RTL coding, implementation, and synthe

ASIC/SoC Design Verification Engineer

TetraMem Inc

Fremont, CA, USA

Full-time

Responsibilities: Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification. Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance. Develop reusable testbench, constrained-random/directed testcases, and verification associated behavioral module for both of block levels and system levels. Develop regression strategy, methodology and tools(scripts). Define

Memory Controller Systems Architect

Kutir Inc

San Jose, CA, USA

Full-time, Part-time, Contract, Third Party

Responsibilities include, but not limited to: Modeling and analysis of system cache, memory controller scheduling algorithms, and features Develop tests, testplans and testing infrastructure for new architecture/features Developing, evaluating and optimizing new memory/storage architectures that improve cost, performance, power and reliability of Mobile product portfolios Part of team assisting development of Architecture for Memory/storage Controllers FPGA/RTL design, validation for Memory/stor