ASIC Jobs in California

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Sr. Package Design Engineer ASIC/SOC

DivTek Global Solutions Inc.

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San Jose, California, USA

Full-time

Job Title Sr. Package Design Engineer ASIC/SOC Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available The Role: Sr. Package Design Engineer We are seeking a highly experienced Package Design Engineer with 7+ years of hands-on
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Posted 10 days ago | Updated 5 days ago

Senior Front-End ASIC Engineer

DivTek Global Solutions Inc.

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San Jose, California, USA

Full-time

Job Title: Senior Front-End ASIC Engineer Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available Job Description Our client is seeking a Senior Front-End ASIC Engineer to join their elite engineering team. This is a unique op
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Posted 10 days ago | Updated 5 days ago

Technical Program Manager (TPM) ASIC / SoC

DivTek Global Solutions Inc.

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San Jose, California, USA

Full-time

Job Title: Technical Program Manager (TPM) ASIC / SoC Hybrid San Jose, CA Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available Position Overview Technical Program Manager (TPM): We are seeking a hands-on Technical Program
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Posted 10 days ago | Updated 5 days ago

Physical Design Engineer Custom ASIC / SoC

DivTek Global Solutions Inc.

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San Jose, California, USA

Full-time

Job Title: Physical Design Engineer Custom ASIC / SoC Hybrid San Jose, CA Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available Position Overview Physical Design Engineer: We are seeking a hands-on Physical Design Engineer w
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Posted 10 days ago | Updated 5 days ago

FPGA/ASIC Verification Engineer (Silicon Engineering)

SpaceX

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Sunnyvale, California, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is th
Posted 11 days ago | Updated 10 hours ago

Sr Director, ASIC Engineering

PaloAlto Networks

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Santa Clara, California, USA

Full-time

Company Description Our Mission At Palo Alto Networks everything starts and ends with our mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world where each day is safer and more secure than the one before. We are a company built on the foundation of challenging and disrupting the way things are done, and we're looking for innovators who are as committed to shaping the future of cybersecurity as we are. Who We Are We take our mission of
Posted 50 days ago | Updated 10 hours ago

FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceX

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Irvine, California, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the worl
Posted 21 days ago | Updated 10 hours ago

Senior Software Engineer, ASIC Verification Tools

NVIDIA

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Santa Clara, California, USA

Full-time

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Posted 1 day ago | Updated 1 hour ago

Senior ASIC Synthesis Engineer

NVIDIA

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Santa Clara, California, USA

Full-time

Come be a part of new process technology adoption by joining NVIDIA's Advanced Technology Group! Work as part of the advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today. We encourage applicants with a history of proven success working
Posted 1 day ago | Updated 1 hour ago

Sr. ASIC Modem Design Engineer, Project Kuiper

Amazon Kuiper Manufacturing Enterprises LLC

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San Diego, California, USA

Full-time

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.Come work at Amazon!We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP's. The Role:Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip S
Posted 3 days ago | Updated 7 hours ago

Sr. ASIC Modem Design Engineer, Project Kuiper

Amazon Kuiper Manufacturing Enterprises LLC

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San Diego, California, USA

Full-time

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP's. The Role: Be part of Project Kuiper's sub-team responsible for defining and implementing the digital c
Posted 3 days ago | Updated 8 hours ago

ASIC Design Engineer STA & SDC Specialist

Della Infotech

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San Jose, California, USA

Third Party, Contract

Minimum Qualifications Bachelor's Degree in Electrical or Computer Engineering with 7+ years of ASIC or related experience or Master's Degree in Electrical or Computer Engineering with 5+ years of ASIC or related experience Experience with block/full chip SDC development in functional and test modes. Experience in Static Timing Analysis and prior working experience with STA tools like PrimeTime/Tempus Understanding of related digital design concepts (eg. clocking and async boundaries) Experience
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Posted 10 days ago

Senior Design Verification Engineer

Sivaltech

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San Diego, California, USA

Contract

Job descriptionCompany Description Sivaltech is a well-established ASIC/FPGA, Analog, and Embedded Software design services company with offices in California, USA, and Bangalore, India. We are a preferred design services partner for both Fortune 500 companies and startups in the semiconductor industry. With expertise spanning GPUs, CPUs, wireless, communications, medical, broadband, and consumer electronics, Sivaltech is well-equipped to address our clients' complex design challenges. Role Desc
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Posted 23 days ago

Senior ASIC Engineer, Static Timing Analysis

Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract, Third Party

Role Title: Senior ASIC Engineer, Static Timing Analysis Location: San Jose, CA Onsite Alternate location: Colorado office - Longmont Remote is an option for right fit Duration: 12+ months contract Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA
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Posted 10 days ago | Updated 2 days ago

Sr. DSP R&D Engineer - C/C++, Wireline, Simulink, ASIC

Motion Recruitment Partners, LLC

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Irvine, California, USA

Full-time

Our client is a glbal infrastructure technology leader built on more than 60 years of innovation within the semiconndutor and Manufacturing space for communications. They are urgently seeking a Sr. level Digital Signal Processing (DSP) R&D Engineer to join their growing team. Responsibilities include: Develop specification, architecture, and micro-architecture of digital signal processing and communications algorithms Bit-exact MATLAB/Simulink and C/C++ system modeling and simulation Develop and
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Posted 60+ days ago | Updated 6 hours ago

Senior Asic Engineer

Aditi Consulting

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California, USA

Full-time

Salary: $280k - $300k/Yr. Responsibilities: Define and architect packet processing pipelines including related lookup tables and metadata structures for high-performance networking ASICs, including ingress/egress processing, switching/bridging and routing, hash tables and memory lookups, classification, ACL, various tunneling protocols like VxLAN, GRE, IPinIP, QoS, scheduling, traffic management, and congestion control. Work closely with the CTO to translate high-level system requirements and c
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Posted 8 days ago | Updated 5 hours ago

ASIC Microarchitect Engineer

APN Software Services, Inc

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Irvine, California, USA

Full-time

Please contact Abdul on "" OR email me at "" Job Summary: As an ASIC Microarchitect, you will play a key role in designing and implementing state-of-the-art digital systems, SoCs, and high-performance RISC-V cores. You will collaborate closely with systems, software, and hardware design teams, as well as the physical implementation team, to architect microarchitectures that optimize power, performance, and area (PPA). We are looking for an innovative thinker who balances pragmatic engineering so
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Posted 51 days ago | Updated 3 days ago

ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Remote

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following positions in Menlo Park, CA ASIC Engineer, Design Verification: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification and develop functional tests based on verification test plan. Telecommute from anywhere in the U.S. permitted. (ref. code REQ-2506-152460: $238,228/year - $287,650/year). Individual pay is determined by skills, qualifications, experience, and loca
Posted 5 days ago

ASIC Engineer

AdientOne LLC

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California, USA

Contract

Role: ASIC Engineer Location: Clara CA 95054 OR Longmont CO 80503 Duration: 12+months Job Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scrip
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Posted 54 days ago | Updated 4 days ago

Senior ASIC Design Engineer- Emulation (HAPS Engineer)

Cloudious

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San Jose, California, USA

Contract

Position: Senior ASIC Design Engineer- Emulation (HAPS Engineer) Location: San Jose, CA (Complete onsite) Experience: 8+ years (Relevant) What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top
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Posted 24 days ago | Updated 14 hours ago