Physical Data Model jobs in Cupertino, CA

Software Engineer, Simulation Infrastructure

San Jose, California

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Today

About the Role Muon seeks a Software Engineer to join our Simulation team. An ideal candidate is a capable generalist software engineer who is as comfortable building reliable web services as they are delivering high-performance compute jobs. In this role, you will be a major contributor to our in-house Simulation tools, adapting our team's numerical computation expertise into complete products relied on throughout the company. This position is hybrid and requires working on-site in our San Jos

Full-time

USD 156,000.00 - 186,000.00 per year

Guidance Navigation & Control Engineer IV (Staff) - Secret clearance

Sunnyvale, California

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7d ago

Job Description About Lockheed Martin Space: Space is a critical domain, connecting our technologies, our security, and our humanity. While others view space as a destination, we see it as a realm of possibilities, where we can do more - we can innovate, invest, inspire, and integrate our capabilities to transform the future. At Lockheed Martin Space, we aim to harness the full potential of space to cultivate innovation, reduce costs, and push the boundaries of what technology can achieve. We'r

Full-time

USD 123,500.00 - 217,695.00 per year

ASIC/SOC DFT Engineer (Silicon Engineering)

Palo Alto, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's

Full-time

USD 135,000.00 - 175,000.00 per year

Principal DFT Engineer (Silicon Engineering)

Palo Alto, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. PRINCIPAL DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world'

Full-time

USD 220,000.00 - 355,000.00 per year

Staff Software Engineer, Simulation Infrastructure

San Jose, California

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Today

About the role Muon seeks a Staff Software Engineer to join our Simulation team. An ideal candidate is an expert generalist software engineer who is as comfortable architecting and building reliable web services as they are delivering high-performance compute jobs. In this role, you will shape the architectural direction of our Simulation tools. You will work with your Simulation Engineer teammates to integrate our simulation models into complete products, and you'll lead the design, developmen

Full-time

USD 210,000.00 - 234,000.00 per year

New Graduate Engineer, Silicon Engineering

Palo Alto, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. NEW GRADUATE ENGINEER, SILICON ENGINEERING Are you an engineering student graduating in fall or this upcoming spring/summer that is looking for full-time employment after graduation? We are looking for engineers to he

Full-time

USD 135,000.00 - 175,000.00 per year

Physical Design Engineer

Mountain View, California

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4d ago

Hi, Job Title: Physical Design Engineer (PnR / PPA / Timing Closure) Location : Mountain View, CA Responsibilities: We are looking for a Physical Design Engineer with strong expertise in Place & Route (PnR), Power-Performance-Area (PPA) optimization, and timing convergence for advanced technology nodes. Preferred Qualifications: Bachelor's or Master's degree in Electrical/Electronics Engineering.Experience in advanced nodes (7nm/5nm/3nm preferred).Strong debugging and problem-solving skills.Exp

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Full-time, Third Party

Depends on Experience

ASIC Design Hardware Engineer - SDC/STA - San Jose, CA (Hybrid)

Hybrid in San Jose, California

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3d ago

ASIC Design Hardware Engineer - SDC/STA (Hybrid) Location: San Jose, California, United States of America You are a diligent Design / SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock groups, exceptions, and clock exclusivity. Proficient in industry-standard SDC/STA tools and scripting for automation, you excel at identifying and resolving timing issues across all design levels. You will develop timing constrains at both block level and fu

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Third Party, Contract

$70+

Principal / Lead Design Engineer – Memory Controller (CHI-G / DFI)

San Jose, California

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2d ago

Principal / Lead Design Engineer Memory Controller (CHI-G / DFI) Were looking for an experienced Principal / Lead Design Engineer to lead RTL development and architecture updates for our Memory Controller subsystem, with strong expertise in ARM CHI-G (Coherent Hub Interface Gateway) and DDR/LPDDR/HBM PHY-facing DFI. Key Responsibilities: Modify and extend existing Memory Controller RTL for new CHI-G and DFI requirements Drive microarchitecture updates for command scheduling, arbitration, Qo

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Contract

Depends on Experience

RISCV CPU Systems Architecture/RTL Engineer - Senior Level

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: We are hiring talented engineers for RISCV CPU RTL development targeting high-performance, low-power devices. In this role, you will contribute to architecture and product definition and be responsible for microarchitecture and RTL execution of CPU system features. These include, but are not limited to: System architecture - configuration access protocols and ordering requi

Full-time

USD 198,700.00 - 298,100.00 per year

Physical Design Engineer & DV Engineers

Sunnyvale, California

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20d ago

Job Title:PhysicalDesignEngineer(PD/PnR) Location Bay Area CA / Austin TX (Hybrid) Job Summary Seeking aPhysicalDesignEngineerwith strong hands-on experience in block-level and top-level Place & Route using Synopsys Fusion Compiler. The candidate will be responsible for implementation, timing closure, low-power integration, and signoff activities for complex SoCdesigns. Key Responsibilities Perform block-level and top-levelPhysicalDesignimplementation using Fusion Compiler. Drive floorplannin

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Full-time

160,000 - 170,000

Senior CPU Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the overseeing of innovative CPU design efforts that have a critical impact on industries across the world. Interfaces with all disciplines to design, verify, and implement multi-core Computer Processing Unit (CPU) operations for QCT. Applies CPU architectural, micro-architecture, and phys

Full-time

USD 142,200.00 - 213,400.00 per year

Senior CPU RTL Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for CPU RTL development targeted for high performance, low power devices. Works with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life cycle. Responsible for performance exploration; explores

Full-time

USD 142,200.00 - 213,400.00 per year

Software Engineer II

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. About the Role Cadence Design Systems is looking for a highly motivated Software Engineer II to join the Innovus R&D team. Innovus is Cadence's flagship digital implementation platform, enabling customers to design advanced semiconductor chips from RTL to GDSII. In this role, you will contribute to the development of next-generation physical design technologies, including placement, ro

Full-time

USD 101,500.00 - 188,500.00 per year

Principal Product Engineer - Virtuoso Backend Flows

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for a Product Engineer to drive the development and customer adoption of advanced backend design flows in Cadence Virtuoso for leading-edge process nodes. This is a customer-facing role that combines physical design methodologies, design automation, and customer engagement. The position plays a key role in enabling efficient design implementation and influencing future p

Full-time

USD 136,500.00 - 253,500.00 per year

Sr. Timing Methodology Engineer

San Jose, California

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Today

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo

Full-time

USD 124,040.00 per year

CPU RTL LLC Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This i

Full-time

USD 198,700.00 - 298,100.00 per year

Senior Silicon Engineer

Santa Clara, California

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Today

Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and complian

Full-time

USD 119,800.00 - 234,700.00 per year

Software Engineer II, Synthesis

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence Design Systems is looking for a highly motivated software engineer to work as a member of the R&D staff on Cadence's Genus Synthesis Solution product. Genus is a complete product that encompasses logic synthesis and physical design. The product breadth means we are looking for skilled and motivated candidates with backgrounds in logic synthesis, word-level synthesis, static timi

Full-time

USD 101,500.00 - 188,500.00 per year

Senior / Principal Layout Engineer - Module Architecture (Pathfinding)

San Jose, California

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Senior / Principal Layout Engineer to drive pathfinding and architecture exploration for next-generation memory modules and form factors (DDR6, LPDDR6/LPDDR7, MRDIMM Gen3/Gen4, SOC

Full-time

USD 202,000.00 - 344,000.00 per year

Physical Data Model jobs in Cupertino, CA, USA