RTL jobs

Mountain View, California

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15d ago

General Skills: Expert communicator across global, cross-cultural, and cross-functional teams. Strong analytical, system level, and architectural thinking. Proven ability to lead technical initiatives without direct authority. High bar for design correctness, validation, and quality. Collaborative mindset across hardware, software, and verification organizations. Required Specialized Skills: Extensive experience in RTL design using Verilog/SystemVerilog for complex digital systems, preferably NP

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Contract

$70 - $80

ASIC Prototyping Engineer IV

Highlands Ranch, Colorado

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Today

Job Description Join Our Team as an ASIC Prototyping Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. Location: This position does not support teleworking; the selected candidate will be located near our Lockheed Martin Space facility in: Littleto

Full-time

USD 123,500.00 - 217,695.00 per year

RTL Engineer (Ethernet)

San Francisco, California

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Today

Sivaltech is hiring an experienced RTL Design Engineer with strong Ethernet expertise for a high-performance Networking IC development role in San Jose, CA. Required SkillsStrong RTL Design experience (Verilog/SystemVerilog)Hands-on with Ethernet (I 802.3)Experience with MAC, PCS, PHY, SerDes integrationKnowledge of ASIC/SoC design flowExperience in clock/reset/power domain designExposure to Layer 2/3/4 protocolsExperience with EDA tools (Synopsys, Cadence, Mentor) PreferredExperience with 100G

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Full-time, Third Party

Depends on Experience

System IP/RTL Design Engineer_Austin, TX (Onsite)_only xoriant W2

Austin, Texas

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Yesterday

Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE:- System IP/RTL Design Engineer LOCATION Austin, TX (Onsite) DURATION 6+ Months (May get extend) MODE OF INTERVIEW Onsite RATE $90 per hour on W2 JOB DESCRIPTION Key responsibilities include: Work on RTL design of System IP block

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Contract

$80 - $90

Principal Engineer, RTL Design - (Contract)

Mountain View, California

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20d ago

Role: Principal Engineer, RTL Design Location: Mountain View, CA (Onsite) Job Type: Contract Project description The Principal Engineer, RTL Design within the NPU Hardware & Software organization, is a senior individual contributor role for an engineer with deep expertise in RTL design and development for complex digital systems, including neural processing units (NPUs) or similar advanced computing architectures. This role provides expert-level technical leadership across architecture,

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Contract, Third Party

$90 - $120

Principal RTL Lead – High-Speed Ethernet (ASIC)

San Francisco, California

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3d ago

Principal RTL Lead High-Speed Ethernet (ASIC)Introduction:We are seeking an experienced Principal RTL Lead to drive the design and verification of next-generation Ethernet subsystems for custom ASIC silicon. This role is central to building architectures that support 400G, 800G, and beyond, enabling ultra-low latency and high reliability in large-scale data centers. As the technical lead, you will guide a team of designers through complex challenges such as multi-lane alignment, Forward Error C

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Contract, Third Party

100 - 120

Design Engineer

Sunnyvale, California

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Today

Payrate: $57.00 - $59.00/hr. Responsibilities:Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII.Contribute to the development, improvement, and automation of various power analysis flows. This includes gathering and analyzing large datasets for power modeling via automated processes.Investigate and address power inefficiencies, providing actionable feedback to the RTL design team. Minimum Qualifications:Demonstrated experience with RTL-to-GDSII design flo

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Contract, Third Party

$57 - $59

ASIC Verification Engineer

Santa Clara, California

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2d ago

Position:ASIC Verification Location:Santa Clara CA & Austin, TX Contract/ Fulltime Job Responsibilities: Architect and develop verification environment, testbench components, and reference models for designs at block and system level.Develop a comprehensive test plan and implement test cases.Verify design in block and chip-level environments using directed and constrained random testing, assertion-based verification, formal analysis, and functional verification.Perform RTL code coverage, assert

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Full-time

Depends on Experience

Front-End Infrastructure Engineer (RTL/Design Verification)_Austin, TX (Onsite)_ only Xoriant W2

Austin, Texas

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Yesterday

Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE:- Front-End Infrastructure Engineer (RTL/Design Verification) LOCATION Austin , TX (Onsite) DURATION 6+ Months (May get extend) MODE OF INTERVIEW onsite RATE As per market (Only Xoriant W2 , no Vendor Employees) JOB DESCRIPTION The

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Contract

$70 - $90

RTL Emulation Engineer

San Jose, California

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Today

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo

Full-time

USD 167,160.00 per year

Integration RTL Design Engineer

San Jose, California

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Today

Full-time

USD 139,860.00 per year

Senior Engineer, RTL Memory Centric Computing

San Jose, California

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Today

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o

Full-time

USD 138,000.00 - 206,000.00 per year

Senior Engineer, RTL

San Jose, California

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Today

Full-time

USD 138,000.00 - 206,000.00 per year

Principal Engineer, RTL Power Macromodeling

San Jose, California

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Today

Full-time

USD 219,000.00 - 351,000.00 per year

AI/ML RTL Engineer

Austin, Texas

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > DSP Architecture and Design General Summary: Job Description Design and development of next-generation microarchitecture and logic for Qualcomm's state-of-the-art Hexagon NPU, powering a wide range of AI/ML applications. In addition to microarchitecture and RTL development, the role includes providing rapid PPA (power, performance, area) feasibility analysis and feedback on new design features. Key Respons

Full-time

USD 127,200.00 - 190,800.00 per year

RTL-GDSII, Sr Application Engineer

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Key Responsibilities Lead technical strategy and execution for critical customer design projects, influencing design methodologies and implementation flows at advanced nodes (3nm and below)Partner with sales teams to grow Cadence business by showcasing Cadence's leadership in digital implementation.Serve as a primary consultant for advanced-node design synthesis & implementation, Agenti

Full-time

USD 84,000.00 - 156,000.00 per year

System IP / RTL Design Engineer

Austin, Texas

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Today

Job Description Vertical Technical Description Key responsibilities include: Work on RTL design of System IP blocks Work independently while closely collaborating with other designers as well as members of verification, physical design, performance and power teams Work on developing and maintaining Front-End Tools, Flows and Methodologies Work on creating scripts that automate repetitive daily tasks of team members Support Silicon bring-up activities Requirements Minimum requirements: Prof

Full-time

Principal Application Engineer

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Establish technical credibility and rapport with the customer and become the go-to expert for all of their technical inquiries and supportExpert in synthesis, RTL rewrite and Innovus+ which is critical for us to get design share with full Cadence Implementation flow.Knowledge of Genus Synthesis Solution to assist and train ensuring customer's design targets are being met.Working closely

Full-time

USD 123,200.00 - 228,800.00 per year

Senior ASIC DV Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: You will contribute to the development of complex SOCs targeted towards Touch Controllers/Wireless Charging Chips and other new initiatives. As a verification engineer, your responsibilities will include: Architecting block and full-chip verification e

Full-time

USD 141,300.00 - 226,000.00 per year

FPGA Engineer

New York, New York

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2d ago

{"description": " About the Position We are looking to hire an Engineer with experience in both software and hardware design to help us build our FPGA-based applications. We're big believers in the ability of tools to make programming faster, more pleasant, and more reliable. We apply these same principles to our FPGA Engineering work, and we're looking for people who are interested in using programming language technology to improve the process of designing, testing, and validating hardware des

Full-time

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