Physical Design Engineer

Job Title: Physical Design Engineer Location: Palo Alto, CA // Onsite Only local candidates allowed Duration: 6-12+ Months Contract Job Description: Exposure to TSMC 2NP/3NP is must Perform endtoend physical design flow: FloorplanningPower planning (PG grid, IR)Placement & optimizationCTS (Clock Tree Synthesis)RoutingPostroute optimizationAchieve timing closure across all modes and corners Resolve DRC, LVS, ERC and signoff violations Handle lowpower design techniques: MultiVt, Multivoltage (UPF

Title: Physical Design Engineer Location: Palo Alto, CA (Full Onsite) Employment Eligibility Statement Due to specific project and client requirements, this position is open to U.S. Citizens and U.S. Lawful Permanent Residents (s) . Sponsorship is not available at this time. Danta Technologies evaluates all candidates in compliance with the Immigration and Nationality Act (INA) and EEOC guidelines . All hiring decisions are made without regard to race, color, religion, sex, gender identity, sex

Location: Palo Alto, CA (Full Onsite) Exposure to TSMC 2NP/3NP is must Perform endtoend physical design flow: oFloorplanning oPower planning (PG grid, IR) oPlacement & optimization oCTS (Clock Tree Synthesis) oRouting oPostroute optimization Achieve timing closure across all modes and corners Resolve DRC, LVS, ERC and signoff violations Handle lowpower design techniques: oMultiVt, Multivoltage (UPF) oPower gating, clock gating Perform physical verification and signoff: oSTA (Primetime) oSI / Cro

Job Title: Physical Design Engineer Location: San Jose CA We are seeking a Physical Design contractor with strong synthesis and implementation expertise to support large, timing-critical designs at advanced technology nodes. Thanks & Regards.., Abishek B Reveille Technologies, Inc