VLSI jobs in Saratoga, CA

San Jose, California

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Today

Job Description ONSITE in San Jose, CA JOB RESPONSIBILITIES Creating AMS/DMS testbench for wireless RF and High Speed PHY. Working with RF/Analog design engineers for analog circuit models Support silicon bring-up and commercialization. REQUIRED SKILLS BS or BE minimum, 3+ year experiences Deep understanding of digital VLSI simulation flow Deep understanding of mixed-mode and analog simulation flow Experience with Verilog/SystemVerilog and RNM modeling Experience with digital verification, U

Contract

PMIC Engineering Program Manager

Cupertino, California

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Today

Apple's Power Management solutions enable the exceptional performance and battery life in every Apple product from iPhone to Mac to Watch. We're seeking a Silicon Program Manager to drive PMIC development from architecture through mass production, combining program leadership with deep technical engagement. Description In this individual contributor role, you'll own full silicon lifecycles for custom Power Management ICs. You'll coordinate cross-functional teams spanning silicon design, system

Full-time

EMIR Engineer

Santa Clara, California

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Today

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you're designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Joi

Full-time

USD 175,000.00 per year

Sr. Principal Product Engineer

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This Senior Principal Product Engineer is a technical leader on the Voltus product engineering team, working on Cadence's power noise and reliability analysis platform. The role sits between strategic customers/foundries, Applications, and R&D, and is accountable for turning the hardest IR/EM, PDN, and electrothermal signoff requirements into product and flow solutions. Key responsibil

Full-time

USD 161,000.00 - 299,000.00 per year

Senior Staff Pre Silicon Verification Engineer

San Jose, California

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Today

Full-time

USD 175,000.00 per year

Staff Engineer, System Validation

San Jose, California

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Today

Staff Engineer, System Validation Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packag

Full-time

USD 175,000.00 - 205,000.00 per year

Software Engineer Simulation Infrastructure

Cupertino, California

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Today

Apple is where individual imaginations gather together, committing to the values that lead to great work. Every new product we build, service we create, or Apple Store experience we deliver is the result of us making each other's ideas stronger. That happens because every one of us shares a belief that we can make something wonderful and share it with the world, changing lives for the better. It's the diversity of our people and their thinking that inspires the innovation that runs through every

Full-time

Senior Product, Test and Yield Enhancement Engineer - Taiwan

Sunnyvale, California

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Today

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprise

Full-time

CPU DFT Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: As a DFT Engineer you will work with chip architects, chip designers, implementation engineers and test engineers to verify the DFT and DFD (Design for Debug) architecture, implementation, and test plans for both mixed signal and digital VLSI designs. Then you'll insure it becomes reality. We're doing a ground up implementation of a new chip architecture, so you'll have to

Full-time

USD 142,200.00 - 213,400.00 per year

Lead Software Engineer: AI for Hardware Verification

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence Design Systems Inc. is looking for a motivated Lead Software Engineer to work with us in San Jose, California. At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and is also a Fortune 100 Best Companies to Work For. As a Lead Software Engineer, you will be part of the H

Full-time

USD 119,000.00 - 221,000.00 per year

Lead Functional Product Engineer, Power Analysis

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for a skilled engineer to join our Power Analysis team, focused on developing, debugging, and deploying Signoff power analysis flows at customer environments. Key Responsibilities Closely work with R&D to develop and maintain Signoff power analysis flows including integration with synthesis and PnR stages Reproduce, debug, and resolve customer-reported issues in power an

Full-time

USD 114,800.00 - 213,200.00 per year

AI / ML DFT Project Lead

Santa Clara, California

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Today

Full-time

USD 203,000.00 per year

PMIC Engineering Program Manager

Sunnyvale, California

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Today

Apple's Power Management solutions enable the exceptional performance and battery life in every Apple product from iPhone to Mac to Watch. We're seeking a Silicon Program Manager to drive PMIC development from architecture through mass production, combining program leadership with deep technical engagement. Description In this individual contributor role, you'll own full silicon lifecycles for custom Power Management ICs and analog IP integrated into Apple SoCs in advanced process nodes. You'l

Full-time

Physical Design Engineer GPU / High-Performance SoC

Remote

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Today

Job Title: Physical Design Engineer GPU / High-Performance SoC Location: Mountain View, CA (Full Onsite) Openings: 2 Job Description We are looking for an experienced Physical Design Engineer with hands-on experience in advanced semiconductor process nodes, particularly TSMC 3nm and/or 2nm, for high-performance SoC, GPU, or similar complex chip designs. The ideal candidate will have strong end-to-end physical design experience, from netlist to GDSII, along with expertise in PPA optimization, tim

Easy Apply

Contract

$60 - $80

IT Integration Engineer Principal

Remote or Chicago, Illinois

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Today

Where You'll Work Inspired by faith. Driven by innovation. Powered by humankindness. CommonSpirit Health is building a healthier future for all through its integrated health services. As one of the nation's largest nonprofit Catholic healthcare organizations, CommonSpirit Health delivers more than 20 million patient encounters annually through more than 2,300 clinics, care sites and 137 hospital-based locations, in addition to its home-based services and virtual care offerings. CommonSpirit has

Full-time

USD 57.37 - 85.33 per hour

DFT Engineer

Santa Clara, California

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Today

We are looking for a highly motivated DFX Engineer to develop, implement, verify, and validate advanced Design-for-Test (DFT/DFX) solutions for complex SoCs and ASICs. The candidate will work closely with Architecture, Design, Verification, Physical Design, and Post-Silicon teams to ensure robust manufacturability, testability, and silicon quality. Key Responsibilities Create and execute test plans for DFX features including Scan, MBIST, SSN, EDT, IJTAG, and JTAG. Verify DFX implementations at I

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Contract

Depends on Experience

DFX/DFT Engineer

Santa Clara, California

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Today

DFX/DFT Engineer Location : Bay area CA Experience :- 6 to 8 yrs Onsite 6-12 months JD:- We are looking for a highly motivated DFX Engineer to develop, implement, verify, and validate advanced Design-for-Test (DFT/DFX) solutions for complex SoCs and ASICs. The candidate will work closely with Architecture, Design, Verification, Physical Design, and Post-Silicon teams to ensure robust manufacturability, testability, and silicon quality. Key Responsibilities Create and execute test plans for DF

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Contract

Depends on Experience

FPGA / VLSI Engineer

Saratoga, California

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Today

Ready to make connectivity from space universally accessible, secure and actionable? Then you've come to the right place! E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems. We're intentional, we're una

Full-time

USD 120,000.00 - 220,000.00 per year

ASIC Methodology Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: The DTECH team is part of the Global SOC organization and is responsible for STA methodology and signoff, foundry technology enablement and analysis, design automation and internal and external EDA tools, design analysis and optimization tools and platforms, low power architecture, methodology, and IP, and foundation IP development. About the Role As a member of the DTECH

Full-time

USD 159,600.00 - 239,400.00 per year

RTL2GDS, Product Engineering Architect

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This position presents an exciting opportunity within Cadence's Digital and Signoff Group (DSG) for a Product Engineer. In this dynamic environment, you'll collaborate closely with R&D, Application Engineering & product marketing teams to help drive the development of advanced chip design software tools. As a Product Engineer, you will serve as a key technical resource, providing place-

Full-time

USD 178,500.00 - 331,500.00 per year

VLSI jobs in Saratoga, CA, USA